Jim,
Google "Steve Weir Interra" and you will get some excellent papers and
presentations on the how and why of the power of reducing the inductance of
your PDS.
Aubrey
Sent from my iPhone
On Jul 20, 2016, at 8:59 PM, Istvan Novak <istvan.novak@xxxxxxxxxxx> wrote:
Jim,
As usual, there is no single yes or no answer to this question, because
the correct answer depends on many factors.
But contrary to popular belief, my general answer is that yes, it is
possibly in a number of circumstances, maybe in a surprisingly large
percentage of all possible cases, to reduce the number of discrete
capacitors by using embedded capacitance (and below you will see that it
is really about inductance, not capacitance). If we put aside several
other questions such as cost and focus only on the electrical
performance of the supply rail in question, we first need to look at the
existing design. There are thirty pieces of 0.22uF capacitors, called
Hi-F, which I assume means they are small-size surface-mount
capacitors. Why do we have thirty of them???? For their capacitance,
which, without any DC or AC bias or any other derating, gives us a mere
6.6uF nominal capacitance? If we need 6.6uF capacitance, we can get it
today from a single small-size ceramic capacitor, we dont need thirty
pieces... Assuming that the starting design is good and the design had
thirty pieces for a good reason, we can quickly convince ourselves that
likely the number of small capacitors is dictated by the total
inductance we want to achieve by them, not by their total capacitance.
Using very simplistic numbers and assuming that the loop inductance from
a single 0.22uF capacitor is 1nH, thirty of them will give us 33pH
cumulative inductance, which just happens to be the square inductance of
a 1-mil (25um) laminate. So all thirty 0.22uF capacitors can be left
out and replaced by a 1-mil laminate. Of course the laminate
capacitance, dependent on its size, will be just a few nF or maybe up to
a few hundred nFs for large laminates, so we will need to add
capacitance, but likely we can do it with much fewer components, under
some circumstances using just bulk capacitors.
Details of actual situations can vary a lot, and for a careful design we
need to look at the whole picture, all constraints and all
requirements. It is true that time-of-flight for available charge will
eventually matter, but this opens up another discussion: time of flight
matters more as the mismatch between PDN components is increased, and it
matters less, and eventually it does not matter at all, for matched
structures. For largely mismatched structures it is easy to show that
the location of available charge, whether it is from a laminate or from
a capacitor, matters.
Regards,
Istvan Novak
Oracle
On 7/20/2016 2:48 PM, Peterson, James F (Chief Engineers) wrote:
Can the capacitance realized by embedding capacitance in the PCB stackup
replace discrete decoupling capacitors?
Let's say the discrete decoupling solution for a processor's Vcore rail has
thirty 0.22 uf Hi-F caps. Is there a practical way to use an embedded
passives approach in the PCB stackup to achieve the needed decoupling
capacitance and thus remove these thirty discrete capacitors?
If so, are there any papers published around this? (I've searched and can't
find anything substantial on replacing discrete ceramic capacitors with
embedded PCB capacitance.)
Thanks,
Jim Peterson
Honeywell Aero
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