[SI-LIST] Re: effects of pattern on transmission line - DDR2
- From: steve weir <weirsp@xxxxxxxxxx>
- To: "San Miguel, Shane" <shane.san.miguel@xxxxxxxxx>,"Steve Horne" <sch@xxxxxxxxxxxxxx>
- Date: Thu, 15 Jan 2004 14:01:04 -0800
Shane, in the end it is Vtt at the differential amplifier input. But, most
of us only get to see it on the PWB.
Steve.
At 01:57 PM 1/15/2004 -0800, San Miguel, Shane wrote:
>By VTT supply, do you mean on-die or external (supplied by the system or
>tester)?
>
>Shane San Miguel
>
>-----Original Message-----
>From: Steve Horne [mailto:sch@xxxxxxxxxxxxxx]
>Sent: Thursday, January 15, 2004 1:52 PM
>To: weirsp@xxxxxxxxxx
>Cc: San Miguel, Shane; silist
>Subject: Re: [SI-LIST] Re: effects of pattern on transmission line -
>DDR2
>
>
>Another issue that can affect this is what the other bits'
>transitions are doing to the VTT termination supply. Having all
>the other bits have an opposite state than the victim (before,
>during and after the isolated 1) may yank the VTT supply in an
>unfavorable direction, affecting the victim bit. At least this
>was the case in DDR1. Your VTT decoupling is therefore an
>important variable in this analysis.
>
>Steve H.
>
>steve weir writes:
> > Shane, what you are dealing with is group delay. You can find it
>described
> > in any filter literature. The low frequency components of the long
>periods
> > before and after the single pulse travel at a different rate than the
>high
> > frequency components of the pulse. This alters the pulse baseline
>and
> > shape. The isolated pulse will appear larger, and more unipolar than
>the
> > later training pulses which will be almost uniform about the origin,
>and
> > very close in shape to each other, as the system has stabilized.
> >
> > Steve.
> >
> > At 11:31 AM 1/15/2004 -0800, San Miguel, Shane wrote:
> > >I have two data patterns of interest (I'll try text) both are a 4
>burst
> > >of 4 type
> > >
> > >
> > >----<xxxxxxxxxxxxxxx>----
> > >
> > >
> > >
> > >----_________| |______------
> > >
> > >
> > >
> > >In the first pattern we have an alternating 010101 type of pattern.
>The
> > >second pattern is all zero's with a 1 in the middle. The first
>pattern
> > >(more traditional) is intended to stabilize the transmission line
>before
> > >the measurement is made. We forget the first and last couple of
>edges
> > >and make rise/fall time measurements on each of the edges in the
>middle
> > >of the train.
> > >
> > >
> > >
> > >My thinking is that the second pattern will produce a slower edge
> > >because you have no activity and the BAM! You have to fill up all
>this
> > >trace capacitance and by the time you do that, the data is done.
> > >
> > >
> > >
> > >I guess my "rule of thumb" is what is stumping me. I look at the
>first
> > >pattern and go "ok, stable DC level, more repeatable results". I
>look
> > >at the second pattern and go "look at that inductive kick - what a
> > >reflection" or "how much is that edge going to roll over"...
> > >
> > >
> > >
> > >Anyone care to educate me on the transmission line behavior with the
>two
> > >patterns?
> > >
> > >
> > >
> > >Shane San Miguel
> > >
> > >
> > >
> > >
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