[SI-LIST] Re: digital circuits radiated emission as a function of VDD
- From: "Andrew Ingraham" <a.ingraham@xxxxxxxx>
- To: "si-list" <si-list@xxxxxxxxxxxxx>
- Date: Fri, 29 Jun 2007 13:32:02 -0400
> Generally speaking , what is the relationship between the digital
> circuits radiated emission( peak emission or maybe RMS ?) and the supply
> voltage ? I could not find an exact answer for this. Maybe you guys here
> can
> educate me ! Thanks,
This is a pretty open question. Perhaps you could clarify.
Do you mean, given a fixed circuit, how do radiated emissions vary as we
vary the supply voltage? (Generally speaking, higher Vdd means higher
currents, and tends to cause faster switching times, both of which will lead
to greater emissions.)
Or do you mean something like the following: As supply voltages have
decreased over the years, what is the relationship between radiated
emissions and the nominal Vdd?
Or in a more specific case, if we were to do 'ideal' scaling applied to CMOS
(where all parameters scale in step with one another according to certain
defined relationships) how to radiated emissions vary with that scaling?
The latter two are not easily answered. I'm guessing you mean the first.
Regards,
Andy
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