[SI-LIST] Re: design of on-chip PDN

  • From: Cosmin Iorga <ci249534@xxxxxxxxx>
  • To: Siming Pan <pansiming86@xxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 1 Nov 2010 17:01:28 -0700 (PDT)

Siming,
The on-chip VDD_core capacitance decouples high-frequency spectral components 
of 
the digital core transient currents that see too much impedance into the PDN 
path to the package and PCB where other decoupling capacitors are placed.   


The incoming noise form the PCB through the power distribution (noise frequency 
components that can make it through the inductive PDN path on the 
chip-package-PCB interface) are typically at enough lower frequency for the 
on-chip core capacitance to be able decouple them efficiently, so they are seen 
almost directly by the core circuits.  


So a common power net would make things worse for the digital core since lower 
frequency spectral components of noise would now pass through the PDN impedance 
into those circuits.  In the same time the core on-chip capacitance will not be 
able to help with decoupling the SERDES injected noise due to the inductance of 
the chip-package-PCB interconnect.

Just a few thoughts...

Cosmin Iorga,
NoiseCoupling.com
http://www.noisecoupling.com









________________________________
From: Siming Pan <pansiming86@xxxxxxxxx>
To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
Sent: Mon, November 1, 2010 4:10:15 PM
Subject: [SI-LIST] design of on-chip PDN

Hi All,
   I have a basic question related to on-chip PDN design. Usually the supply
voltages are designed to be isolated for core, SERDES

digital, analog, termination, etc. This design may isolate the SSN
couplings among each net. However, usually large on-chip decoupling

capacitances are used for VDD core circuit. In the board design, we connect
the power nets of VDD_core together with VDD_digitalã??

Thus, switching noises generated from SERDES digital are suppressed by large
on-chip decaps designed for core circuit. However,

package inductances  still play a bad role here to block the conducted path
between noise source formed by digital circuit and core

capacitances. Then why not use one common power net as the supply power for
all the IC circuits, so that large on-chip decaps can be

shared, if the voltage levels are the same?

Regards,

Siming Pan


-- 
Siming Pan

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