[SI-LIST] Re: delay vs. transmission line length
- From: art_porter@xxxxxxxxxxx
- To: Raymond.Leung@xxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Wed, 11 Jun 2003 07:44:00 -0600
Well, that's the definitive behavior of a transmission line. A properly
terminated transmission line "looks" resistive (i.e. voltage and current are in
phase at all frequencies). If it isn't properly terminated, it still "looks"
resistive at the time of the incident wave. The driver doesn't "see" the
reflection of whatever is at the end of the transmission line until a time
equal to twice the delay of the transmission line. A "short" transmission line
doesn't have any inherent added "C load." With a short transmission line, there
is less time between the incident edge and the reflection from the C (or
whatever else) at the end of the transmission line. If the length of the
transmission line is short compared to the transition time of the edge, then
it's difficult to distinguish the incident edge from the reflection. That is
the source of the "rule of thumb" that you can model transmission lines as
lumped elements if their length is <1/5 (or 1/3, or 1/10, depending on which "a
uthority" you prefer) of the transition time.
Art
-----Original Message-----
From: Raymond.Leung@xxxxxxxxxxx [mailto:Raymond.Leung@xxxxxxxxxxx]
Sent: Tuesday, June 10, 2003 6:20 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: delay vs. transmission line length
I think it is more or less like a resistive load seen by the driver
when the T-line is long enough. As what Jon has described
below, the C load of a short line would cause longer Tpd.
Raymond
"Jon Powell" <jonpowell@xxxxxxxxxxxx> on 11/06/2003 01:07:31
Please respond to jonpowell@xxxxxxxxxxxx
To: yonitz@xxxxxxxxxxxxx, "Si-List (E-mail)" <si-list@xxxxxxxxxxxxx>
cc: (bcc: Raymond Leung/sdc)
Subject: [SI-LIST] Re: delay vs. transmission line length
In a lot of ways this relates to a previous question on how to measure
time-of-flight and relate that properly to the CLK->Q data in a static
timing program. Since the actual CLk->Q (Tpd or whatever) of the device is
dependent on load, the datasheets will spec it into a specific load and then
it becomes the job of the SI and Timing tools to figure out how to properly
change that data for accurate total path timing. It used to be that most
drivers were spec'd into 50pf loads because that happened to be the loads on
the chip testers. Now days 50pf is so far away from the real load that that
spec isn't good enough for many purposes.
As other people have pointed out, if the load is closer to the driver than a
round-trip, the C of the load is seen by the driver and can change the
transition rate of the driver, which effectively changes Tpd. If the load is
farther away than a round-trip it is effectively non-existent to the driver
(at least starting from steady-state) and can have no effect on Tpd.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]On
Behalf Of Yoni Tzafrir
Sent: Tuesday, June 10, 2003 5:45 AM
To: Si-List (E-mail)
Subject: [SI-LIST] delay vs. transmission line length
hi,
i run some simulations, for measuring Tpd from input of the of the =
driver to the output of the driver.=20
|\
| \driver transmission line
input------------| =
\---------------------------------------------------LOAD
| /out
|/
I have noticed that the longer my transmission line, the Tpd becomes =
shorter.
does it make sense? as i understand it a longer transmission line means =
more capacitance (and resistance) so the Tpd should be longer, doesn't =
it?
Yonatan (Yoni) Tzafrir
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