[SI-LIST] cpu socket

  • From: =?big5?b?U3RhbmxleS5DaGl1KKr0q6uyTSk=?= <Stanley.Chiu@xxxxxxxxxx>
  • To: "Si-List (E-mail)" <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 12 Dec 2001 21:06:40 +0800

dear sirs;

  anyone who familiar with cadence spectraquest simulation tool could give
me a tip how to make a combinaton between cpu and cpu socket and doing
simulation?? here is my question.. since spectraquest extract the netlist
form *.brd file,  the *.brd netlist come from schmatic file, in schematic
file there's only one component ( ex; u1)stands for cpu , how do I assign
model for cpu in simulation since actually u1 including socket and cpu
itself, any good modeling strategy for solving  this kind of problem ??
   any input will be appreciated!!


------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List archives are viewable at:     
                //www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages 
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu
  

Other related posts: