[SI-LIST] bare die IBIS models
- From: "Tate, David" <david.tate@xxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 16 Jan 2008 09:22:36 -0600
I am using bare die (bumped flip chip) in a SIP application utilizing
solder attachment to the substrate.
I need to modify the package pin parasitic parameters in the
representative IBIS models. What should I use
if anything for the package pin patristic parameters for this type of
attachment? I did find a document
that described a model which could be used for ACF attachment, but do
not know if the results would be the
same for solder attachment. The document is titled "High-Frequency SPICE
Model of Anisotropic Conductive Film
Flip-Chip Interconnections Based on a Genetic Algorithm" and appeared in
the IEEE TRANSACTIONS ON COMPONENTS
AND PACKAGING TECHNOLOGIES, VOL. 23, NO. 3, SEPTEMBER 2000.
best regards,
David Tate
Lockheed Martin Missiles and Fire Control
Senior Staff Circuit Design Engineer
Electrical Engineering - FPGA/Processor Design
E-Mail: david.tate@xxxxxxxx
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