[SI-LIST] Re: about capacitor on hdi board
- From: "Han, Guobing" <han.guobing@xxxxxxxxx>
- To: "AAA?????" <sky_of_bj@xxxxxxxxxxx>
- Date: Thu, 19 Aug 2010 16:18:51 +0800
Hi sky_of_bj,
What's the location of this DECAP?
How do you set the two ports to get S21, at two ends of the power net?
Thanks,
Guobing
2010/7/26, steve weir <weirsi@xxxxxxxxxx>:
> Yes, inductance is of an entire loop. For convenience of analysis the
> loop is often broken into components. The effective inductance of the
> capacitor to the PDN is the loop that includes the interconnect to the
> rest of the PDN, ( or at least where you are measuring ), and the
> physical capacitor structure. This presentation from my web site
> explains the physics.
> http://www.ipblox.com/pubs/SVCEMC_Feb_2006/stack_up_vias_pdn_public.pdf
> The chart on page 23 should help you.
>
> Steve.
> AAA????? wrote:
>> Hi All,
>> a power net on hdi board ,I find that the 100nf capacitor 's(only one
>> capacitor) resonance frequecy (the capacitor package is 0201)is 38Mhz(test
>> S21 by VNA), rather higher than its normal resonance frequecy 18Mhz(if not
>> consider the parasitic inductor on the pcb borad).
>>
>> Does the pcb board impact the capacitor and the esl of the capacitor
>> become smaller?
>>
>>
>> Can anybody help me in solving this?
>>
>> Regards,
>> sky_of_bj
>>
>>
>>
>> _________________________________________________________________
>> Ò»ÕÅÕÕƬµÄ×԰סª¡ªWindows LiveÕÕƬµÄ¿É°®ÊÓƵ½éÉÜ
>> http://windowslivesky.spaces.live.com/blog/cns!5892B6048E2498BD!889.entry
>>
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--
Thanks,
- Robin (Han, Guobing)
TEL: 86-21-61094805
MSN: han_guobing@xxxxxxxxxxx
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