I have some questions : 1. how long is the limit length of PCI clock trace length on PCB ? 2. Is there any skew between the PCI clock and data signals besides that PCI clock is 2.5inch and data signals is shorter than 1.5 inch on daughter card ? 3. is ther any problem that the PCI host is in the middle of the PCI bus and there are two PCI devices on the both sides of the PCI host ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu