[SI-LIST] Re: Xilinx IBERT Testing
- From: "Al Neves" <al@xxxxxxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Fri, 15 Jul 2011 11:17:21 -0700
Chris,
The method to address this problem is relatively straightforward if you can
create a simple clock output from your BERT, AND can optimize BER into a
host of channel losses and pathologies. The clock jitter power spectral
decomposition has very similar jitter contribution due to PDN signal
integrity, multiplied reference noise from your TX REF IN, etc., as related
to a PRBS pattern WITHOUT the Data Dependant Jitter of a PRBS like pattern.
I would first analyze and benchmark the clock-pattern jitter output.
Clock output does not have Data Dependant Jitter, such as your PRBS patterns
- it breaks the jitter problem down very nicely. We solved so many SERDES
problems with these practical and simple methods.
Data Dependant Jitter, or DDJ is exactly that... jitter that is directly
related to the complexity of a PRBS pattern. The more complicated PRBS
patterns will always have more DDJ due to complexity of the power spectral
density, associated run lengths and associated low frequency and white like
nature of their unique PSD.
We wrote a paper DesignCon2011 using our Channel Modeling Platform, CMP-08
where we benchmarked a host of channel losses with different patterns and
created a matrix of DDJ. LeCroy, Teraspeed, Wild River Technology, and
Simberian Inc were co-authors ("Developing Unified Methods of 3D
Electromagnetic Extraction, System Level Channel Modeling, and Robust Jitter
Decomposition in Crosstalk Stressed 10Gbpsec Serial Data Systems"). I would
follow this benchmarking method but use BER in addition to channel jitter,
and also add crosstalk, and adjacent channels running.
I would optimize the channel with simple PRBS patterns after the
clock-pattern analysis, then methodically the following:
Optimize and record BER for:
1. short low-loss channels, pristine return loss channel, measure BER,
PRBS7 through 31. Make sure you achieve much better than 10E-12.
2. moderate channel loss, say .5UI opening, repeat optimizations with PRBS
7 to31.
3. high loss channels with almost closed eye opening, repeat with all
patterns
4. moderate channel loss with crosstalk aggression with BUJ closing eye
down .1UI from number 2 .8UI closed eye TJ at 10E-12
5. almost closed eye with high loss, and high levels of crosstalk
6. crash test using very high loss, very high crosstalk, etc., catalogue
where things blow lock, very poor BER, etc.,
7. repeat above with other channels in the device running.
The point of the above is that optimization methods has basic goal of
maximum BER, but your constrained by ISI in the channel AND noise created in
the channel, AND the pattern length and complexity. Too much EQ aggravates
noise impact, too little doesn't address ISI due to channel losses. I
recall that this specific optimization is Wiener-Hopf optimization problem.
Numerous silicon SERDES folks are using Channel Modeling platform products
to improve their optimization methodology into a host of channels since the
platform is easily reconfigurable at 10Gbsec to provide ala carte
pathologies (ISI, crosstalk, mode conversion, etc.,). You can create a
pristine opened eye, or one closed down with either/or crosstalk or ISI.
Although the last comment is a bit of a plug for our product, we are trying
to address exactly the problem signal integrity engineers like yourself have
with channel optimization.
Check out: http://www.youtube.com/watch?v=vUB77mAVWXQ
Products for the Signal Integrity Practitioner
Wild River Technology LLC
Alfred P. Neves
Founder - Engineer - Business Development
(503) 718 7172 Office
(503) 679 2429 Mobile
735 South East 16th Ave.
Hillsboro, OR 97123
www.wildrivertech.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of steve weir
Sent: Thursday, July 14, 2011 10:19 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Xilinx IBERT Testing
Chris, the maximum run lengths of a given PRBSn pattern are: n 1's, and
n-1 0's. Failure of PRBS15/23/31 indicates that you have frequency
dependent distortions. Those could be coming from your channel, or from
your PDN. An brief list of things I would check first:
1. Tx eye quality. This will tell you if the problem is excessive
distortion and/or attenuation in the channel.
If the Tx eye looks good then you will need to look at the channel
1.S parameters on the channel from VNA or TDT measurements
2. Preemphasis settings for the transmitter
3. Equalization settings for the receiver
4. AC coupling capacitor values and termination arrangement
If the Tx eye is poor then you will need to look at the PDN and the
reference clock.
PDN
1. Tx driver PDN Z vs F
2. PLL PDN Z vs F
Reference clock
1. Reference oscillator stability
Steve
On 7/14/2011 9:53 PM, Chris Johnson wrote:
> I am debugging a board with a Virtex-6 HX380 chip and having some issues
> with getting low error rates using the Xilinx IBERT tool. I can tweak
> the MGTH parameters to have zero or near-zero errors for a PRBS7
> pattern, but not for longer patterns, such as PRBS15/23/31. Is there a
> particular design flaw that is more likely to cause pattern sensitive
> failure for longer PRBS patterns, or could it be just about anything?
> The links are running at 10.3125 Gbps.
>
> Thanks,
> Chris
>
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
>
> or to administer your membership from a web page, go to:
> //www.freelists.org/webpage/si-list
>
> For help:
> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
>
>
> List technical documents are available at:
> http://www.si-list.net
>
> List archives are viewable at:
> //www.freelists.org/archives/si-list
>
> Old (prior to June 6, 2001) list archives are viewable at:
> http://www.qsl.net/wb6tpu
>
>
>
--
Steve Weir
IPBLOX, LLC
150 N. Center St. #211
Reno, NV 89501
www.ipblox.com
(775) 299-4236 Business
(866) 675-4630 Toll-free
(707) 780-1951 Fax
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List technical documents are available at:
http://www.si-list.net
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List technical documents are available at:
http://www.si-list.net
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
