I agree that Steve had this correct. I had some offline discussions
w/Steve back in that timeframe and between that and the decoupling
capacitor/PDN performance optimization research studies we did at in my
EMC design research lab at Compaq on this topic back in the early 90's,
also considering "side mounted decoupling capacitors" (yes, that format
was around back then) because we were already seeing EMC issues long
before anyone became concerned about PDN performance. Anyway, Steve and
I were in agreement that they worked well enough but that the layout and
placement were absolutely critical which agrees with Scott's recent
input on this re: spreading inductance and placement distance. If it
matters, we had the test boards micro-sectioned after the fact to make
absolutely sure that we made no assumptions about mounting dimensional
parameters. IIRC, someone on that team later wrote a paper on part of
that study (not all) but I have since forgotten its title and the name
of fellow who wrote it. Sorry I cannot remember who but that was back in
the days when my head was handed to me daily for saying what this forum
has rightly understood these days as good engineering practice. It was
heresy back then. BTW, as you might guess, the results of that study
back then were in good agreement with most of what has been posted on
here as good design practice for quite some time. I hope that helps.
Michael E. Vrbanac
EMC Forensics, President
On 03/11/2016 10:00 AM, David Anthony wrote:
Lee, the vendors dimensionally detail land pad 'recommendations' for X2Y, but
stay away from dimensioning specific via layouts. Scroll down to Johanson's
'PCB mounting' tab at this link:
http://www.johansondielectrics.com/x2y-filter-decoupling-capacitors#pcb
Below the land pad dimensions, Johanson shows 'stick' figure via layouts in
the PDN Bypass applications section, notice the 'recommended' and 'poor'
layout depictions, no dimensions. If any vendor sent you, or you downloaded a
vendor document specifying the poor layout please send it to me. Steve would
not specify that poor layout as you suggest, these early 2004-05 papers are
just a few examples of the low inductance he preached:
Bypass Capacitor Inductance, Data Sheet Simplicity to Practical Reality
http://www.ipblox.com/pubs/DesignConEast_2005/DesignCon%20East%202005%20TF2_ipb.pdf
Considerations for Capacitor Selection in FPGA Designs
http://www.x2y.com/publications/decoupling/mar21-05.pdf
-Dave
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Lee Ritchey
Sent: Friday, March 11, 2016 1:07 AM
To: tom@xxxxxxxxxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx; 'Ray Anderson'; cristian.gozzi@xxxxxxxxx;
Charles.Grasso@xxxxxxxxxxxx; 'Ray Anderson'
Subject: [SI-LIST] Re: X2Y equivalent circuit model
The board layout complied exactly with what was specified by the vendor. I
believe that that layout was specified by Steve. IT looks like what is on
his test PCB.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Tom Dagostino
Sent: Wednesday, March 9, 2016 10:19 AM
To: leeritchey@xxxxxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx; 'Ray Anderson' <raya@xxxxxxxxxx>;
cristian.gozzi@xxxxxxxxx; Charles.Grasso@xxxxxxxxxxxx; 'Ray Anderson'
<ray.anderson@xxxxxxxxxx>
Subject: [SI-LIST] Re: X2Y equivalent circuit model
Lee you know that board was not the optimal layout. Steve told you it was
incorrect.
Tom Dagostino
Tom Dagostino
Teraspeed LabsOn Mar 9, 2016 8:30 AM, Lee Ritchey <leeritchey@xxxxxxxxxxxxx>
wrote:
We mounted the X2Y capacitors exactly as specified in the applications------------------------------------------------------------------
notes provided by the vendor.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Grasso, Charles
Sent: Monday, March 7, 2016 7:46 AM
To: leeritchey@xxxxxxxxxxxxx; cristian.gozzi@xxxxxxxxx; 'Ray Anderson'
<ray.anderson@xxxxxxxxxx>; si-list@xxxxxxxxxxxxx
Cc: 'Ray Anderson' <raya@xxxxxxxxxx>
Subject: [SI-LIST] Re: X2Y equivalent circuit model
Hello Lee - What method is used for a capacitor to be properly
mounted? So, if an X2Y capacitor is properly mounted the <insert
metric here> will not improve?
Best Regards
Charles Grasso
Compliance Engineer
Echostar Communications
(w) 303-706-5467
(c) 303-204-2974
(t) 3032042974@xxxxxxxxx
(e) charles.grasso@xxxxxxxxxxxx
(e2) chasgrasso@xxxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Lee Ritchey
Sent: Saturday, March 05, 2016 5:44 AM
To: cristian.gozzi@xxxxxxxxx; 'Ray Anderson'; si-list@xxxxxxxxxxxxx
Cc: 'Ray Anderson'
Subject: [SI-LIST] Re: X2Y equivalent circuit model
Our tests show that the X2Y capacitor is no better than a properly
mounted
0402 capacitor.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Cristian Gozzi
Sent: Friday, March 4, 2016 10:57 AM
To: Ray Anderson <ray.anderson@xxxxxxxxxx>; si-list@xxxxxxxxxxxxx
Cc: Ray Anderson <raya@xxxxxxxxxx>
Subject: [SI-LIST] Re: X2Y equivalent circuit model
Thanks
it worked ;-)
Regards
Cristian
Il giorno gio 3 mar 2016 alle ore 10:04 Ray Anderson <
ray.anderson@xxxxxxxxxx> ha scritto:
Cristian-attachments immediately.
Johanson Dielectrics has downloadable spice models available from
this web
page:
http://www.johansondielectrics.com/x2y-filter-decoupling-capacitors
download link:
http://www.johansondielectrics.com/downloads/JDI_X2Y_H-Spice_Files.z
ip
They should be usable in ADS using the ADS 'Hspice Compatibility
Component' Wizard. (in fact I just confirmed that they import OK).
-Ray Anderson
Xilinx Inc.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Cristian Gozzi
Sent: Thursday, March 03, 2016 9:07 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] X2Y equivalent circuit model
Hi Si expert
I was looking for a good circuit model for X2Y capacitor to be used
in my ADS circuit simulation
on internet I found this
http://www.x2y.com/bypass/X2Y%20Equivalent%20Circuit%20for%20Models.
pd
f
but when I tried to implemented it, something was wrong The
impedance vs freq. shapes on log/log scale does not seem correct
can someone give to me any feedback or good reference to look for?
thanks in advance
Regards
Cristian
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