[SI-LIST] Re: Which layer is better for GHz signals
- From: "Leonard Dieguez" <leonard.dieguez@xxxxxxxxxx>
- To: <Chris.Cheng@xxxxxxxxxxxx>, <scott@xxxxxxxxxxxxx>, <michael.mirmak@xxxxxxxxx>
- Date: Thu, 4 Aug 2005 12:24:08 -0700
Chris,=20
That gives a good reason to use lower impedance traces on the inner
layers for sure. I believe that one needs tool look at all the
advantages and disadvantages of Microstrip vs Stripline=20
I would look at trace length and frequency. The threshold of pain needs
to be set.=20
While routing signals on the top layer does let you use wider traces for
a given stackup. One has to also think about the nearend and farend
crosstalk and what that means to EMI. Both microstrip and stripline
both exhibit nearend crosstalk to a coupled line. While and "Ideal"
Stripline would not have or have little farend crosstalk.=20
Leonard=20
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Chris Cheng
Sent: Thursday, August 04, 2005 11:09 AM
To: scott@xxxxxxxxxxxxx; michael.mirmak@xxxxxxxxx
Cc: Ravinder.Ajmani@xxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Which layer is better for GHz signals
There are practical reasons why microstrip is preferred. Try to route
150ohm differential traces in a lot of stripline layers and maintaining
a thin PCB and you will know what I mean.
I never have problem with EMI with clocks, diff or single ended pairs on
microstrip. Like I said many times, maintaining your current return is
the key.
________________________________
From: si-list-bounce@xxxxxxxxxxxxx on behalf of Scott McMorrow
Sent: Thu 8/4/2005 10:38 AM
To: michael.mirmak@xxxxxxxxx
Cc: dbostan@xxxxxxxxx; Ravinder.Ajmani@xxxxxxxxxxxxxx;
si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Which layer is better for GHz signals
Michael
Even with minimal differential trace coupling, the radiated fields from
the two sides of a differential pair will cancel each other in the far
field. Generally, it is the common mode components of differential
signals that cause significant radiation.
regards,
scott
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax
http://www.teraspeed.com
Teraspeed(r) is the registered service mark of Teraspeed Consulting
Group LLC
Mirmak, Michael wrote:
>Dan,
>
>Isn't the amount of EMI reduction from the use of "differential" traces
>dependent on the amount of coupling between them? From the PC-based=20
>designs I have seen recently, the coupling between microstrip traces is
>very weak compared to the coupling to the reference plane. The traces=20
>are more-or-less single-ended in this kind of case, with all the EMI=20
>radiation effects this implies.
>
>Are the traces you have seen very strongly coupled?
>
>- Michael Mirmak
> Intel Corp.
> Chair, EIA IBIS Open Forum
>
>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx=20
>[mailto:si-list-bounce@xxxxxxxxxxxxx]
>On Behalf Of Dan Bostan
>Sent: Thursday, August 04, 2005 9:33 AM
>To: Ravinder.Ajmani@xxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: Which layer is better for GHz signals
>
>In general, it is better to use inner layers for high speed signals,=20
>for EMI reasons. However, since the GHz traces are differential, the=20
>radiated field is not as strong as in the case of single ended traces.
>>From my experience, EMI was not a factor in routing such signals. =20
>>Which
>means, that your other concerns should dictate the layer.
>My two cents.
>/dan
>
>
>
>--- Ravinder.Ajmani@xxxxxxxxxxxxxx wrote:
>
>=20
>
>>Hi All,
>>For my next design I am considering a different approach to route the=20
>>GHz=3D20 signals. I would like to know the views of other esteemed SI =
>>experts on=3D20 the following two approaches.
>>=3D20
>>A) Current Design: Differential traces are routed on Top and =
Bottom=3D20
>>layers. The advantage of this approach is that I can route one=20
>>pair=3D20 without using any vias, and I get more usable board space. =20
>>The=3D20 disadvantage is that traces on Top and Bottom layers have=20
>>greater=3D20 impedance discontinuities due to uneven plating and=20
>>soldermask=3D20 application.=3D20 =3D20
>>B) Proposed Design: Differential traces will be routed on the=20
>>inner=3D20 layers. The advantage here is that the trace impedance =
will=20
>>be more=3D20 uniform as the trace will be covered with dielectric on=20
>>both sides, and=3D20 there will be no plating. The disadvantage is=20
>>that=3D20 I will have to use=3D20 two vias on each trace, and I will =
have=20
>>less routing space.
>>=3D20
>>The reason for considering the new approach is because of the EMI=20
>>issues=3D20 with the previous design traced to common-mode currents. =
I=20
>>am not sure=3D20 which design will have less common-mode effect, as =
one=20
>>design has=3D20 discontinuities due to plating/soldermask whereas the=20
>>other design has=3D20 discontinuities due to extra vias.=3D20 =3D20 =
The=20
>>trace length is about 2 inches.
>>=3D20
>>Regards, Ravinder
>>Server PCB Development
>>Hitachi Global Storage Technologies
>>=3D20
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