[SI-LIST] Re: Where are IBIS models with SSO support ?

  • From: "Lance Wang" <lwang@xxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Tue, 13 Jan 2009 21:39:58 -0500

Hi, Chris,
Just for the info.

You can use Spice Macromodeling to convert IBIS new SSO models easily. So,
we don't have to wait for the simulation tool enhancement. 

We have done few cases for some system companies using this
feature/technology (IBIS BIRD 98/95). And results are pretty good.

Yes, I personally did not see any chip vendors giving out any IBIS SSO model
yet. However, we are ready for making and using them.

Regards,

Lance Wang
978-764-2298
IO Methodology Inc. (www.iometh.com)
A High-Speed Design Utility Tool and Service Provider

Meet us in DesignCon 2009, Booth 925.

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Chris Cheng
Sent: Tuesday, January 13, 2009 5:50 PM
To: David Lieby; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Where are IBIS models with SSO support ?

Can a behavioral model predict SSO impact? Yes, BTDT over ten years ago.
Can an IBIS 2.x I-V curve be somehow hacked to model SSO? No, BTDT and
proved it can not. Hence there is 4.x model.


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of David Lieby
Sent: Tuesday, January 13, 2009 2:27 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Where are IBIS models with SSO support ?


Several years ago I saw a paper by someone (I have forgotten the name of
the author) that detailed the use of IBIS files in HSPICE to get an idea
of SSO in a system.  The system is set up to use the current output and
timing from the IBIS file, along with some extrapolation for cross
current, to get a result of the current usage of a switching output.
Then
several of them are fed from a power bus with a feed that is set up to
look like several adjacent power/ground connections to the board.

Yes, there are a lot of people who are taken aback by this approach.  On
the other hand, once you go through the exercise and calibrate the
results
across at least one existing system (lab measurements, ghastly), you
have
something that is within 10 percent of what you really will see when the
system is built.  It does take time and no one else will do the work or
figure out what you really want.

I kept a whole group of hardware engineers happy with this approach and
the results with real systems.

Cheers,
dav0
David Lieby

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