[SI-LIST] Re: Where are IBIS models with SSO support ?
- From: "Chris Cheng" <Chris.Cheng@xxxxxxxx>
- Date: Tue, 13 Jan 2009 13:32:48 -0800
Ok, almost 20 threads but I still don't get my answer. If the standard
is there, where are the models?
A few observations:
a) The lamest I've heard so far is "I've got an SSO problem in my chip
but I don't want my customer to simulate it even thought he/she can see
it in the real chip." Please....
b) SSO is a chip problem, system folks can't do anything about.
SSO is a fact of life, it results in push out and pull in on DQ that
will impact the source synchronous cycle time. It needs to be known and
budgeted just like crosstalk or reflection. Without this knowledge you
have to guardband it and leave performance on the table.
SSO can also kill a source synchronous bus in particular by collapsing
the strobe signals or edges under SSO condition. System folks need to
know under what loading and topology condition will that happen.
c) SSO can be budgeted in an IC spec without the system designers
involved
The combine effect of topology reflection, termination scheme, DIMM
loading have drastic impact on SSO effects on bus timing. How on earth
the IC vendor can predict their customer ahead of time?
Back to my original question:
Where is the IBIS models with SSO support
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