[SI-LIST] Re: What it takes to be a Signal Integrity Expert
- From: "Todd Westerhoff" <twesterh@xxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Mon, 4 Nov 2002 10:32:51 -0500
Shiraz,
I would suggest you define the topic as "High Speed Design" and not simply
"Signal Integrity". In my own experience, the details of how timing margins
are calculated for high speed interfaces are overlooked, or riddled with
poor assumptions and missing data.
High Speed interface design needs to start from a detailed understanding of
how an interface operates and the details of how the timing is
measured/specified for the different components. Given that information,
you can use signal integrity analyses to determine the "flight time" between
components and understand whether the interface can be expected to work at
its intended speed. Signal Integrity simulations provide two key pieces of
information - signal quality metrics (i.e. overshoot magnitude, or whether
you're likely to damage a receiver) and flight time. Without a good
interface timing model, flight time numbers are essentially meaningless (or
at least, out of context).
My point here is that you should consider timing analysis and signal
integrity as two sides of the same coin.
Todd.
Todd Westerhoff
Signal Integrity Engineer
Cisco Systems
250 Apollo Drive - Chelmsford, MA - 01824
email:twesterh@xxxxxxxxx
ph: 978-497-0272
============================================
"When did the choices get so hard, with so much more at stake?
Life gets mighty precious when there's less of it to waste"
- Bonnie Raitt, "Nick of Time"
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Shiraz Bashir
Sent: Saturday, November 02, 2002 1:03 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] What it takes to be a Signal Integrity Expert
I am a student and just want to know that what it
takes to be a Signal Integrity Expert.
In other words, what Signal Integrity Skills,
Expertise and tool one should you know in order to
pursue a career in Signal Integrity domain.
CMOS CHIP Design and SI are new areas to me so wnat to
make sure that I learn as much as I can from all of
you.
Thanks in advance for your help.
Shiraz
General Electric
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