[SI-LIST] Re: What is the acceptable minimum pre-pregthickness for volume manufacturing?
- From: "Salkow, Steven" <steven.salkow@xxxxxxxx>
- To: leeritchey@xxxxxxxxxxxxx, Steve Weir <weirsi@xxxxxxxxxx>, John Andresakis <John.Andresakis@xxxxxxxxxxxxx>, Gilles Aminot <aminotg@xxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Tue, 05 Sep 2006 09:58:59 -0700
Gilles:
I may be coming in late on this discussion and the gurus may have
answered all of your concerns. As mentioned earlier, Sanmina and other
top end vendors has some know how in this area. They and other vendors
have dielectrics targeted for this application that have higher Er and
thinner layers (special dielectrics thinner than 1 mil but still very
tough) These vendors have been doing this for 15+ years.
Like many things, there are many ways to skin the cat. You mentioned
recommended thickness some I am assuming you want to stay reasonable. If
you asked your fabricators they will tell you pre-preg is available in 1
mil thickness but it is like the wings of a butterfly and THEY DO NOT
LIKE WORKING WITH MATERIAL THIS THIN. High reliability manufacturing
want to see two layers of pre-preg in a stackup to insure pinholes do
not compromise dielectric withstand. Any material without the copper
cladding cannot be adequately tested for dielectric breakdown. Let say
you had a stackup where the layers went Microstrip gnd power signal.
Normally the stackup would be Microstrip and gnd then prepreg- prepreg
and power. What if it was Microstrip prepreg-prepreg gnd and power. Then
the power ground layer could be a 1 mil copper clad board to start with.
The microstrip layer to gnd was two dielectric layers for higher
reliability at 2 mils each making the min thickness around 4 mils.
Steven Salkow
Lockheed IS&S
3130 Zanker Rd, San Jose
Ca. 94588
(408) 473-4058
steven.salkow@xxxxxxxx
salkow@xxxxxxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Lee Ritchey
Sent: Tuesday, September 05, 2006 9:09 AM
To: Steve Weir; John Andresakis; Gilles Aminot; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: What is the acceptable minimum pre-pregthickness
for volume manufacturing?
Steve,
Good eye! Somehow, I typed the wrong date in my reference library
index.
That is the article.
It is curious that thousands of PCBs have been designed with planes
separated by thin dielectrics for the purpose of forming planae
capacitance
without any of them being challenged as violating these patents.
Lee
> [Original Message]
> From: steve weir <weirsi@xxxxxxxxxx>
> To: <leeritchey@xxxxxxxxxxxxx>; Andresakis, John
<John.Andresakis@xxxxxxxxxxxxx>; Gilles Aminot <aminotg@xxxxxxx>;
si-list@xxxxxxxxxxxxx <si-list@xxxxxxxxxxxxx>
> Date: 9/4/2006 11:39:51 PM
> Subject: [SI-LIST] Re: What is the acceptable minimum
pre-pregthickness
for volume manufacturing?
>
> Lee, did you mean August 2004? Joel's piece can be found on the 3M
web
site.
>
>
http://multimedia.mmm.com/mws/mediawebserver.dyn?6666660Zjcf6lVs6EVs66S7
3jCO
rrrrQ-#search=%22%22printed%20circuit%20design%22%20%2B%22the%20history%
20of
%20embedded%22%22
>
> Regards,
>
>
> Steve.
> At 11:34 AM 9/4/2006, Lee Ritchey wrote:
> >There was an article in the August 03 issue of Printed Circuit Design
> >magazine titled "The History of Embedded Distributed Capacitance," by
Jole
> >Pfeiffer of 3M showing that the patents held by Sanmina-SCI are
invalid
due
> >to the existance of both prior art and prior patents.
> >
> >
> > > [Original Message]
> > > From: Andresakis, John <John.Andresakis@xxxxxxxxxxxxx>
> > > To: Gilles Aminot <aminotg@xxxxxxx>; si-list@xxxxxxxxxxxxx
> ><si-list@xxxxxxxxxxxxx>
> > > Date: 8/30/2006 8:45:29 PM
> > > Subject: RE: [SI-LIST] What is the acceptable minimum pre-preg
thickness
> >for volume manufacturing?
> > >
> > > Gilles,
> > >
> > > Depending on the copper weight and the area of copper retained,
you
can
> >use
> > > lower than 4 mils. The situation is that Sanmina has a patent for
> >forming a
> > > capacitor plane in-situ, which is what you are trying to do. It
makes
no
> > > difference whether you purchase a 2 mil core or use 2 mil prepreg
between
> >a
> > > power and ground plane during pressing, it still is covered by
patents.
> > >
> > > Best Regards,
> > >
> > > John Andresakis
> > > Oak-Mitsui Technologies
> > > (518) 686-8088
> > >
> > > -----Original Message-----
> > > From: Gilles Aminot
> > > To: si-list@xxxxxxxxxxxxx
> > > Sent: 8/30/2006 10:44 PM
> > > Subject: [SI-LIST] What is the acceptable minimum pre-preg
thickness
for
> > > volume manufacturing?
> > >
> > > Hi All,
> > > Is there a PCB guru out there who can tell me what is the minimum
> > > recommended pre-preg thickness for volume manufacturing? I want to
> > > increase inter-plane capacitance by reducing the pre-preg
thicnkess
> > > between my power and ground planes. Currently we are using a
pre-preg
> > > thickness of 4mils. I did some research and found that pre-preg
comes
in
> > > thicknesses as low as 2mils. Can we go as low as 2mils between
planes
on
> > > an FR-4 PCB designed for RoHS compliance and still have a board
which
> > > can be reliably built in high volume?
> > >
> > > Thanks in advance for your replies.
> > >
> > > Kindest Regards,
> > > Gilles Aminot
> > >
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