Hello, experts, 1.25V DDR termination power Vtt should both sink and source current. I wondered what happened if such a power cannot sink current? What effects would this on DDR chip and on Power-Manangment IC? Could anyone kindly provide some advices, research papers or reports on this? Thank you very much. -- Best Regards Li Han ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu