Eric, It is true that IBIS (up to version 4.0) was basically made up of DC IV curves, but there is a little more to it than just that. IBIS also has a parameter to represent the die-capacitance, called C_comp. This includes everything that you see when you look into the die at the pad. C_comp can be split into 4 parts which are connected to the respective reference nodes that the corresponding IV curves are connected to. So if the pullup IV curve is connected to the pullup reference, it can have its parallel C_comp_pullup, and so on. This feature comes handy when someone is interested in power delivery simulations. One of the biggest drawback of C_comp for very high speed simulations is that it is a single and constant number (aside from the 4-way splitting mentioned above). I.e., you can't=20 describe the voltage or frequency dependence. For this reason, the IBIS model maker has to pick the best value for C_comp that is valid for the frequency of operation and the signaling levels of the buffer. This can be done, but may not be sufficient in every situation. This is where the latest version of the IBIS specification v4.1 comes handy. In this version we added new language extensions to IBIS with which you can basically describe a buffer to any level of accuracy. For example, using VHDL-AMS, or Verilog-AMS you can write your own capacitance equation(s) any whichever way you want to. You can include charge conservation, frequency and voltage dependency, or anything you need. You could even model the piezo effects due to mechanical vibration if you want to, just to name an extreme example which was recently mentioned on the SI-list. (Even though I doubt that this effect would appear on the die). It is now strictly up to the model writer to make a model as accurate as possible. Arpad Muranyi Intel Corporation =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Eric Goodill Sent: Tuesday, September 14, 2004 11:55 AM To: si-list Subject: [SI-LIST] What frequency are IBIS models good to? Howdy, We were having a discussion around work the other day about the maximum=20 frequency any given SPICE or IBIS model is good to. For SPICE circuit=20 models, it seemed pretty clear that the frequency accuracy of the model=20 depends on how good a job the model builder did at including parasitics=20 and so forth that come into play as the frequency increases. Our understanding of IBIS models is not great, but we understand them to be essentially I-V curves. One fellow asserted that this info is=20 gathered essentially at DC and thus could not represent the=20 high-frequency (> 500 MHz) behavior of a driver. Comments? -Eric --=20 Eric Goodill Redback Networks ericg@xxxxxxxxxxx 300 Holger Way voice: (408) 750-5319 San Jose, CA 95134-1362 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu