[SI-LIST] Re: WG: Re:AW: Re: PCB Insertion loss prediction
- From: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>
- To: "bertsimonovich@xxxxxxxxxx" <bertsimonovich@xxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 12 Nov 2012 17:36:45 +0000
Thanks Bert, and to all the other excellent responders. As you and others
note, it's a race between conductor loss, which is aided by the lower Er, and
dielectric loss, which is aided by lower TanD.
For standard FR4 materials (1a -> 1b), higher Resin Content (RC) hurts you: the
higher Df causes significant increase in dielectric loss; the decrease in
conductor loss due to wider trace width (from 4.3 to 4.5 mils to keep Z0
constant with lower Dk) is overwhelmed.
For the low loss materials (2a -> 2b, 3a -> 3b), the conductor loss hugely
dominates, making the behavior distinctly different than for standard FR4
materials. The small increase in TanD* doesn't do much. But, lower Er forces
wider traces (assuming Z0 is kept constant), decreasing conductor loss
significantly.
* Yes, Df must actually increase, regardless of how it's quoted in Meg-6 spec.
sheets, but the increase seems too small for them to report
# Mat'l Const T RC Dk Df T
W S Z0 Loss
1a IS370HR 1x2113 PP 3.9 57% 4.02 0.021 1.2 4.3
7.2 85 -0.8
1b IS370HR 2x106 PP 4.2 75% 3.75 0.0247 1.2 4.5
7 85 -0.84
2a IS415 1-2116 Core 4 45% 3.98 0.0114 1.2
4.1 7.4 85 -0.632
2b IS415 1x3313 Core 4 54% 3.76 0.0123 1.2
4.4 7.1 85 -0.628
3a Meg-6 1x3313 Core 4 54% 3.71 0.002 1.2
4.4 7.1 85 -0.438
3b Meg-6 2x1035 Core 4 65% 3.46 0.002 1.2
4.7 6.8 85 -0.421
The equations you provided highlight the relative impact of dielectric and
conductor loss for these various scenarios nicely.
I think this example stresses why no simple "rules-of-thumb" will allow us to
accurately predict insertion loss; some form of tool which takes into account
all the complex interactions is needed.
Thanks for all the great insights,
Jeff Loyer
-----Original Message-----
From: Lambert Simonovich [mailto:bertsimonovich@xxxxxxxxxx]
Sent: Wednesday, November 07, 2012 6:52 PM
To: Loyer, Jeff; buenos@xxxxxxxxxxx; Gert.Havermann@xxxxxxxxxxx;
si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: WG: Re:AW: Re: PCB Insertion loss prediction
Jeff,
Excellent example. Thanks for your persistence in this discussion. You pointed
out some detail I never really stopped to think about with regards to resin
content and insertion loss.
I agree a good field solver will give you the answers you posted, but I also
believe you could gain the same intuition using simple equations to estimate
the loss of a single trace given the same constraints in your table.
Certainly to illustrate the same point.
In one of Eric Bogatin's Net seminars, on loss budgeting a few years ago, he
gave a couple of useful equations to estimate insertion loss of a single trace.
In the 1st edition of his book, "Signal Integrity Simplified", he has
variations of these equations using impedance in Chapter 9. Howard Johnson's
Black Magic Books are also good places to start understanding. I'm sure many
here on this list have cut their teeth with these three books.
Equations:
Conductor loss = -0.5dB x len x sqrt(BR)/w(approx) Dielectric loss = -2.3dB x
Df x Len x BR(approx) IL = Conductor Loss + Dielectric Loss(approx)
Where:
IL = Insertion loss in dB
BR = Bit Rate in GB/s (= 2xBW in GHz)
len = length in inches
w = trace width in inches
Df = Dissipation factor
Plugging the respective numbers from your table using 8 GB for BR, I get the
following comparisons with less than 0.1dB per inch delta:
(Hopefully table is not mangled up....)
Loss(dB/inch @ 4GHz(8GB/s); Cond loss; Diel Loss; IL; Delta
-0.8; -0.33; -0.39; -0.72; -0.08
-0.84; -0.31; -0.45; -0.77; -0.07
-0.632; -0.34; -0.21; -0.55; -0.08
-0.628; -0.32; -0.23; -0.55; -0.08
-0.438; -0.32; -0.04; -0.36; -0.08
-0.421; -0.30; -0.04; -0.34; -0.08
I'm not advocating equations are a sole substitute for "proper tools", but they
are useful, non the less, to gain insight and to give you some confidence you
have applied the tools correctly. And they are cheap. In this case, they
corroborate the actual measurements Terry was initially puzzled about, but
still doesn't address why a higher Df results in lower IL with newer material.
Now I'm curious to find out why?
-Bert Simonovich
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Loyer, Jeff
Sent: November-07-12 6:32 PM
To: buenos@xxxxxxxxxxx; Gert.Havermann@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: WG: Re:AW: Re: PCB Insertion loss prediction
Oops - didn't work - resend; the table may still get munged.
To me, I don't consider the question "basic", as I understand it.
Going back to the original posting:
"I'm from PCB house. Recently we have producted some insertion loss test
boards(16L, SET2DIL coupon, IS415/IT150DA/I-Speed Mid/low loss material with
RTF copper foil). We found that the multiply core and high resin PP will result
a lower loss result. It's a trouble to MI engineer. I would like to know how
to predict the loss base on stackup. Please help to suggest (papers, script,
free software etc ). Thanks a lot!"
Aside from spelling and grammatical errors, which are irrelevant, I'm not clear
what distinguishes this from a "valid" question. To me, it highlights a very
interesting conundrum which many would find non-intuitive, and not covered
(directly) in any books, papers, or postings that I'm aware of (please feel
free to correct this):
For standard FR4 materials, we are used to the idea that, to reduce insertion
loss, we might use less resin content - resin is more lossy than glass. This
is not true for lower loss materials. I put together some simple stripline
topologies* to demonstrate what I think is the puzzle. I hope the table gets
through. Note that, in the IS370HR ("standard FR4") example below, loss
increases as resin content is increased.
But, in the IS415 and Meg-6 ("mid/low loss") examples, loss decreases as resin
content increases (as Terry notes), even though Df increased for the higher
resin IS415.
Material Construction Thickness Resin Content Dk (1GHz)
Df (1GHz) T W S Z0 Loss
(mils) (%)
(dB/inch @ 4GHz)
IS370HR 1x2113 PP 3.9 57% 4.02 0.021 1.2 4.3 7.2
85 -0.8
IS370HR 2x106 PP 4.2 75% 3.75 0.0247 1.2 4.5 7
85 -0.84
IS415 1-2116 Core 4 45% 3.98 0.0114 1.2 4.1
7.4 85 -0.632
IS415 1x3313 Core 4 54% 3.76 0.0123 1.2 4.4
7.1 85 -0.628
Meg-6 1x3313 Core 4 54% 3.71 0.002 1.2 4.4
7.1 85 -0.438
Meg-6 2x1035 Core 4 65% 3.46 0.002 1.2 4.7
6.8 85 -0.421
* Yes - I made some simplifications to make this paper exercise easy - can't
have cores or prepregs on both sides of the traces, for instance. I kept the
pitch constant, which is a reasonable constraint on a PCB house.
Perhaps this reversal of insertion loss vs. resin content trends is common
knowledge which falls under the guise of "basic training" to some, but I don't
think so. As I said in an earlier posting, there are many complex factors at
play - it's not a trivial solution. And, in order to perform the study I
demonstrate here, you need tools which aren't available to many.
It seems like he was presented with a uniquely puzzling situation and was
asking for clarification and/or tools (albeit cheap) which would help him
predict the behavior better than existing rules-of-thumb. I don't consider it
trivial or answerable with a web search, and I believe it's relevant to many
participants of this list.
Full Disclosure: Terry works for a vendor which provides PCB's to my company,
though I didn't know that from his original posting. I've had some off-line
discussion with him.
Jeff Loyer
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Istvan Nagy
Sent: Wednesday, November 07, 2012 8:55 AM
To: Gert.Havermann@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: WG: Re:AW: Re: PCB Insertion loss prediction
Hi All,
I often see posts on Si-list where the OP wants to get a basic training on an
SI/PI topic for free, and especially free-of-hassle. Many people refuse to read
one article per year or to buy and read a book. In case of insertion loss, they
could start with a Google search and read the resulting articles, but that's
too much hassle, instead they ask someone to explain all.
Probably these are the same people who need an organized training about
everything in order to learn something. Not everyone can do individual
literature research, but whos problem is it, or how to handle it? The Si-list
seems to be a forum for two things: sharing our research with other
researchers, as well as asking/answering basic questions by people who dont do
any research. "Hi list, please kindly teach me singal integrity, I need it by
tomorrow for a project..."
Often afer reading all relevant Google results something is still not clear or
seem to contradict with something, then I post on Si-list or elsewhere.
Sorry if this sounded arrogant.
"get the impedance right, and it took years for the pcb makers to understand
the problem and get enough knowledge to support the SI engineer" -many vendors
are still not completely there yet unfortunatelly.
regards,
Istvan Nagy
-----Original Message-----
From: Havermann, Gert
Sent: Wednesday, November 07, 2012 1:53 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] WG: Re:AW: Re: PCB Insertion loss prediction
Resent
Von: Havermann, Gert
Gesendet: Mittwoch, 7. November 2012 10:10
An: si-list@xxxxxxxxxxxxx
Betreff: AW: Re:[SI-LIST] AW: Re: PCB Insertion loss prediction
Terry,
please don't get us wrong. our postings were not about "you made us mad", it
was just as much explanation as we are willing to give away for free (and why).
I understand that all this really complicated SI-stuff is a burden for PCB
vendors like you are, but on the other hand, for very high speed digital
transmission, impedance and insertion loss control is a must, and just
specifying the stack, material and tracewidth just isn't enough anymore
(especially as long as the PCB vendor is not able to control these
characteristics).
Ten years ago, we have had trouble to get the impedance right, and it took
years for the pcb makers to understand the problem and get enough knowledge to
support the SI engineer in getting the correct impedance right the first time.
But still there are PCB makers that have no clue, and for them impedance
control is a function of try and error.
Now it gets even harder for PCB makers as insertion loss comes into play, and
this is much more material and process related than just impedance.
There is an Intel paper where they had identical PCBs built by different PCB
vendors resulting in different insertion loss values. I don't know how tight
their PCB spec was in regards to stack and material, but this already shows how
much difference can happen even though they all followed the same spec.
I'm happy to see that you are interested in learning more about SI. I think
these papers are a good start:
http://lamsimenterprises.com/Practical_Fiber_Weave_Modeling_Iss3_Mar2_12.pdf
http://www.ieee802.org/3/bj/public/jan12/beers_01a_0112.pdf
http://www.arlon-med.com/Loss%20Tangent.pdf
BR
Gert
Von: Terry Ho [mailto:pcb_layup@xxxxxxx]
Gesendet: Mittwoch, 7. November 2012 09:36
An: Havermann, Gert
Cc: si-list@xxxxxxxxxxxxx
Betreff: Re:[SI-LIST] AW: Re: PCB Insertion loss prediction
I don't expect my posting will bring in unhappy. I'm sorry for that.
I try to think out where I am wrong. I think maybe the word "Free" came from
PCB house guy is the root cause. But I said papers, script, free software etc.
My purpose just want to get suggests, not wish to get a free tool.
How about if I asked question "Free software tool" for PCB impedance
prediction". I think I will get some good suggests.
What's the difference between impedance and insertion loss?
Impedance is common; insertion loss is top secret now. PCB house need do
research to keep competence advantage.
It seems reasonable PCB house must control insertion loss to satisfy customer.
Yes, it makes sense from biz view. Customer is God.
But on other hand, I think someone in the supply chain does not do his job
well. PCB fabricator's job is manufacturing the layout. We don't produce the
Electric characterization.
Electric character is SI engineer's job, right? If we follow the stackup
design, trace width/space, specific material spec and made quality boards but
results of impedance or insertion loss are out spec.
Who is the real murder to the fail? SI designer, I think. It's not the PCB
house. But the reality is cruel. PCB house will be the murder and will be
punished.
I have seen some imperfect projects. For example, one OEM/ODM asked us to
control insertion loss 0.8 db/inch for normal FR-4.
- VNA and SET2DIL coupon are designed but don't design SET2DIL
"Thru" coupon.
- Very thick dielectric with 2ply 7628 PP (we can not to modify
stackup with 4ply 2116 PP due to the risk of lamination shifting )
As PCB manufacturing engineers, we must study and research. But I think the
cooperation is the most important.
SI designers wish to control insertion loss and introduce in the concept as
industry standard. SI designer/experts have duty to develop tool and provide
training for supply chain (OEM/ODM layout guys, PCB guys etc). Not everyone in
the chain has SI background, the designer also need to consider the PCB
manufacturable.
Please forgive me if I made you unhappy. Thanks!
Especially thanks Jeff for his support on this posting.
Best regards,
Terry Ho
At 2012-11-05 17:05:01,"Havermann, Gert"
<Gert.Havermann@xxxxxxxxxxx<mailto:Gert.Havermann@xxxxxxxxxxx>> wrote:
>Jeff,
>
>I totally agree with Steve. We went a long way with effort, money and
>pain to arrive at where we're at, and we don't give this knowledge away
>for free.
>On the other hand you are right, this SI-List is for education and we
>should provide answers. This is a bit of a dilemma.
>
>Terry,
>my advice to you is to address your question to the laminate vendors.
>If they don't provide dielectric properties for their different Resin
>content materials, there is no way for you to predict the loss
>correctly. Look at the Material Datasheets ISOLA provides with their
>material. There you will find plots of dk vs. Resin Content, and lists
>of the resin content per glass style. Isola also offers a calculator to
>predict the final dk if multiple different prepregs are stacked. In my
>eyes ISOLA is doing the best job in regards to SI.
>But even with these or other tools, it is just prediction and it is
>your job to test, verify and learn to become an expert.
>
>I'm certain that if you dig deep into the SI stuff, and you find some
>detailed specific effect you can't explain, that you will get a much
>better response here on SI-List (because those problems are the fun
>side of SI)
>
>Good Luck
>
>Gert
>
>
>
>----------------------------------------
>Absender ist HARTING Electronics GmbH, Marienwerderstraße 3, D-32339
>Espelkamp; Registergericht: Amtsgericht Bad Oeynhausen; Register-Nr.:
>HRB 8808; Vertretungsberechtige Geschäftsführer: Dipl.-Kfm. Edgar-Peter
>Düning, Dipl.-Ing. Torsten Ratzmann, Dr.-Ing. Alexander Rost
>
>
---------------------------------------------------------
Absender ist HARTING Electronics GmbH, Marienwerderstraße 3, D-32339 Espelkamp;
Registergericht: Amtsgericht Bad Oeynhausen; Register-Nr.: HRB 8808;
Vertretungsberechtige Geschäftsführer: Dipl.-Kfm. Edgar-Peter Düning,
Dipl.-Ing. Torsten Ratzmann, Dr.-Ing. Alexander Rost
-----Ursprüngliche Nachricht-----
>Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
>Im Auftrag von steve weir
>Gesendet: Donnerstag, 1. November 2012 04:15
>An: si-list@xxxxxxxxxxxxx
>Betreff: [SI-LIST] Re: PCB Insertion loss prediction
>
>Jeff, given that the only two responses were Scott and mine, I am
>surprised that you are disappointed with both.
>
>In a fabrication market filled with intense competition it is up to
>individual players to keep up with the technology requirements of the
>market or get left behind. The task is not simple. Depending on how
>far up the frequency range one needs to go, dialing in cost effective
>process requires substantial skills, time, effort and serious money.
>It represents competitive advantage to OEMs and their partner pcb fab
houses alike.
>Neither who have invested are likely to hand over that kind of
>advantage especially when it is so costly to obtain.
>
>I don't mind that Terry is looking for a solution on the cheap or free.
>If one could obtain such a sweet deal, one would be foolish not to take
>it. I am troubled that in this day in age, his organization hopes to
>address a sophisticated issue before his technical staff has a grip on
>the basics. I fail to understand what you find inappropriate about
>that concern. I would rather yell at someone headed for a cliff to
>stop than smile and wave.
>
>Best Regards,
>
>
>Steve.
>
>On 10/31/2012 2:33 PM, Loyer, Jeff wrote:
>> I'm surprised at the tone of the responses to this posting (but
>> perhaps I shouldn't be, unfortunately); I don't see anything untoward
>> in it. I would like to provide some context (with some assumptions
>> on my part) for the message lest other innocent postings meet with
>> similar fates. I'll also (eventually) provide my answer to the
>> question,
as I understand it.
>>
>>
>> There is a significant portion (majority?) of the industry which is
>> extremely cost constrained. For instance, to them rotating a design
>> 10 degrees is impractical, much less 22 or 45 degrees. Thus, they
>> find other cost-effective yet effective means of solving problems
>> (such as zig-zag routing), even though those don't appear efficient
>> to others to whom cost is not an issue.
>>
>>
>>
>> There are new pressures being applied to this segment - designers are
>> now not only requiring impedance control, but are also insisting on
>> insertion loss control. This is a HUGE paradigm shift, very similar
>> to what we encountered when traceable impedance control was first
>> introduced. That was a very challenging evolution, and this will be
also.
>>
>>
>>
>> As an example, PCB vendors are now being advised to smooth their
>> copper, after years of purposely roughening it for best mechanical
>> integrity. It should come as no surprise that this is not a trivial
>> change, considering the effort that has gone into ensuring
>> mechanically
robust designs.
>>
>>
>>
>> Likewise, many other basic assumptions that we've been able to apply
>> for years are now being drawn into question, and PCB vendors are
>> looking for help to intelligently and cost-effectively explore
>> options - "How much effect does rougher copper have on insertion
>> loss?". I believe Terry is highlighting the fact that, while there
>> are many tools available for impedance prediction, insertion loss
modeling is much less accessible.
>> I don't think it is inappropriate to ask if there are cost-effective,
>> reliable tools available to predict insertion loss based on a
>> proposed stackup.
>>
>>
>>
>> Unfortunately, I believe the answer to the question is that there are
>> no reliable, cheap (~free) modelers available to predict insertion loss.
>> And, the ones that are available require a great deal more knowledge
>> about the stackup than impedance modeling does, and that information
>> is not easily obtained. There are some of us working with a vendor
>> to test their modeler against a variety of stackups and we'll present
>> results at DesignCon. My personal goal is not so much to test a
>> specific modeler but to judge how effective a modeler can be given
>> information that can reasonably be gleaned prior to building with
>> various materials, copper types, etc.
>>
>>
>>
>> In the absence of a modeling tool, or in addition to one, I believe
>> empirical data is the best predictor of insertion loss. To do this,
>> however, you have to build a stackup representing the final design,
>> and it's not clear at this point how broadly you can extrapolate
>> those results to other stackups. But, I know many material vendors
>> and PCB shops are engaged in similar efforts.
>>
>>
>>
>> I think this is very similar to what we went through with impedance
>> control - the shops which most quickly were able to predict and
>> control that characteristic had an advantage. I think successful PCB
>> vendors will need reliable modeling software and empirical data on
>> insertion loss for their particular choices of materials, etc. - they
>> will be able to find the most cost effective solution.
>>
>>
>>
>> Bottom line: I doubt a reliable modeling tool is going to be cheap,
>> but is going to be necessary, and you'll want to compare any tool you
>> do purchase against empirical data before you trust it.
>>
>>
>>
>> I hope this helps,
>>
>> Jeff Loyer
>>
>>
>>
>> -----Original Message-----
>>
>> From:
>> si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>
>> [mailto:si-list-bounce@xxxxxxxxxxxxx]<mailto:[mailto:si-list-bounce@f
>> r
>> eelists.org]> On Behalf Of Terry Ho
>>
>> Sent: Monday, October 29, 2012 5:52 PM
>>
>> To:
>> si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx<mailto:si-list@fre
>> elists.org%3cmailto:si-list@xxxxxxxxxxxxx>>
>>
>> Subject: [SI-LIST] PCB Insertion loss prediction
>>
>>
>>
>> Hello experts,
>>
>> I'm from PCB house. Recently we have producted some insertion loss
>> test boards(16L, SET2DIL coupon, IS415/IT150DA/I-Speed Mid/low loss
>> material with RTF copper foil). We found that the multiply core and
>> high resin PP will result a lower loss result. It's a trouble to MI
>> engineer. I would like to know how to predict the loss base on
>> stackup. Please help to suggest (papers, script, free software etc ).
Thanks a lot!
>>
>>
>>
>> Best regards,
>>
>> Terry Ho
>>
>>
>>
>>
>>
>> ------------------------------------------------------------------
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>
>
>--
>Steve Weir
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http://www.qsl.net/wb6tpu
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To unsubscribe from si-list:
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or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List forum is accessible at:
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List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
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No virus found in this message.
Checked by AVG - www.avg.com
Version: 2013.0.2742 / Virus Database: 2617/5871 - Release Date: 11/03/12
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To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List forum is accessible at:
http://tech.groups.yahoo.com/group/si-list
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
