[SI-LIST] WG: Re:AW: Re: PCB Insertion loss prediction
- From: "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
- To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Wed, 7 Nov 2012 09:53:56 +0000
Resent
Von: Havermann, Gert
Gesendet: Mittwoch, 7. November 2012 10:10
An: si-list@xxxxxxxxxxxxx
Betreff: AW: Re:[SI-LIST] AW: Re: PCB Insertion loss prediction
Terry,
please dont get us wrong. our postings were not about you made us mad, it
was just as much explanation as we are willing to give away for free (and why).
I understand that all this really complicated SI-stuff is a burden for PCB
vendors like you are, but on the other hand, for very high speed digital
transmission, impedance and insertion loss control is a must, and just
specifying the stack, material and tracewidth just isnt enough anymore
(especially as long as the PCB vendor is not able to control these
characteristics).
Ten years ago, we have had trouble to get the impedance right, and it took
years for the pcb makers to understand the problem and get enough knowledge to
support the SI engineer in getting the correct impedance right the first time.
But still there are PCB makers that have no clue, and for them impedance
control is a function of try and error.
Now it gets even harder for PCB makers as insertion loss comes into play, and
this is much more material and process related than just impedance. There is an
Intel paper where they had identical PCBs built by different PCB vendors
resulting in different insertion loss values. I dont know how tight their PCB
spec was in regards to stack and material, but this already shows how much
difference can happen even though they all followed the same spec.
Im happy to see that you are interested in learning more about SI. I think
these papers are a good start:
http://lamsimenterprises.com/Practical_Fiber_Weave_Modeling_Iss3_Mar2_12.pdf
http://www.ieee802.org/3/bj/public/jan12/beers_01a_0112.pdf
http://www.arlon-med.com/Loss%20Tangent.pdf
BR
Gert
Von: Terry Ho [mailto:pcb_layup@xxxxxxx]
Gesendet: Mittwoch, 7. November 2012 09:36
An: Havermann, Gert
Cc: si-list@xxxxxxxxxxxxx
Betreff: Re:[SI-LIST] AW: Re: PCB Insertion loss prediction
I dont expect my posting will bring in unhappy. Im sorry for that.
I try to think out where I am wrong. I think maybe the word Free came from
PCB house guy is the root cause. But I said papers, script, free software etc.
My purpose just want to get suggests, not wish to get a free tool.
How about if I asked question Free software tool for PCB impedance
prediction. I think I will get some good suggests.
Whats the difference between impedance and insertion loss?
Impedance is common; insertion loss is top secret now. PCB house need do
research to keep competence advantage.
It seems reasonable PCB house must control insertion loss to satisfy customer.
Yes, it makes sense from biz view. Customer is God.
But on other hand, I think someone in the supply chain does not do his job
well. PCB fabricators job is manufacturing the layout. We dont produce the
Electric characterization.
Electric character is SI engineers job, right? If we follow the stackup
design, trace width/space, specific material spec and made quality boards but
results of impedance or insertion loss are out spec.
Who is the real murder to the fail? SI designer, I think. Its not the PCB
house. But the reality is cruel. PCB house will be the murder and will be
punished.
I have seen some imperfect projects. For example, one OEM/ODM asked us to
control insertion loss 0.8 db/inch for normal FR-4.
VNA and SET2DIL coupon are designed but dont design SET2DIL
Thru coupon.
Very thick dielectric with 2ply 7628 PP (we can not to modify
stackup with 4ply 2116 PP due to the risk of lamination shifting )
As PCB manufacturing engineers, we must study and research. But I think the
cooperation is the most important.
SI designers wish to control insertion loss and introduce in the concept as
industry standard. SI designer/experts have duty to develop tool and provide
training for supply chain (OEM/ODM layout guys, PCB guys etc). Not everyone in
the chain has SI background, the designer also need to consider the PCB
manufacturable.
Please forgive me if I made you unhappy. Thanks!
Especially thanks Jeff for his support on this posting.
Best regards,
Terry Ho
At 2012-11-05 17:05:01,"Havermann, Gert"
<Gert.Havermann@xxxxxxxxxxx<mailto:Gert.Havermann@xxxxxxxxxxx>> wrote:
>Jeff,
>
>I totally agree with Steve. We went a long way with effort, money and pain to
>arrive at where we're at, and we don't give this knowledge away for free.
>On the other hand you are right, this SI-List is for education and we should
>provide answers. This is a bit of a dilemma.
>
>Terry,
>my advice to you is to address your question to the laminate vendors. If they
>don't provide dielectric properties for their different Resin content
>materials, there is no way for you to predict the loss correctly. Look at the
>Material Datasheets ISOLA provides with their material. There you will find
>plots of dk vs. Resin Content, and lists of the resin content per glass style.
>Isola also offers a calculator to predict the final dk if multiple different
>prepregs are stacked. In my eyes ISOLA is doing the best job in regards to SI.
>But even with these or other tools, it is just prediction and it is your job
>to test, verify and learn to become an expert.
>
>I'm certain that if you dig deep into the SI stuff, and you find some detailed
>specific effect you can't explain, that you will get a much better response
>here on SI-List (because those problems are the fun side of SI)
>
>Good Luck
>
>Gert
>
>
>
>----------------------------------------
>Absender ist HARTING Electronics GmbH, Marienwerderstraße 3, D-32339
>Espelkamp; Registergericht: Amtsgericht Bad Oeynhausen; Register-Nr.: HRB
>8808; Vertretungsberechtige Geschäftsführer: Dipl.-Kfm. Edgar-Peter Düning,
>Dipl.-Ing. Torsten Ratzmann, Dr.-Ing. Alexander Rost
>
>
---------------------------------------------------------
Absender ist HARTING Electronics GmbH, Marienwerderstraße 3, D-32339 Espelkamp;
Registergericht: Amtsgericht Bad Oeynhausen; Register-Nr.: HRB 8808;
Vertretungsberechtige Geschäftsführer: Dipl.-Kfm. Edgar-Peter Düning,
Dipl.-Ing. Torsten Ratzmann, Dr.-Ing. Alexander Rost
-----Ursprüngliche Nachricht-----
>Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im
>Auftrag von steve weir
>Gesendet: Donnerstag, 1. November 2012 04:15
>An: si-list@xxxxxxxxxxxxx
>Betreff: [SI-LIST] Re: PCB Insertion loss prediction
>
>Jeff, given that the only two responses were Scott and mine, I am surprised
>that you are disappointed with both.
>
>In a fabrication market filled with intense competition it is up to individual
>players to keep up with the technology requirements of the market or get left
>behind. The task is not simple. Depending on how far up the frequency range
>one needs to go, dialing in cost effective process requires substantial
>skills, time, effort and serious money. It represents competitive advantage
>to OEMs and their partner pcb fab houses alike. Neither who have invested are
>likely to hand over that kind of advantage especially when it is so costly to
>obtain.
>
>I don't mind that Terry is looking for a solution on the cheap or free.
>If one could obtain such a sweet deal, one would be foolish not to take
>it. I am troubled that in this day in age, his organization hopes to
>address a sophisticated issue before his technical staff has a grip on
>the basics. I fail to understand what you find inappropriate about
>that concern. I would rather yell at someone headed for a cliff to stop than
>smile and wave.
>
>Best Regards,
>
>
>Steve.
>
>On 10/31/2012 2:33 PM, Loyer, Jeff wrote:
>> I'm surprised at the tone of the responses to this posting (but perhaps I
>> shouldn't be, unfortunately); I don't see anything untoward in it. I would
>> like to provide some context (with some assumptions on my part) for the
>> message lest other innocent postings meet with similar fates. I'll also
>> (eventually) provide my answer to the question, as I understand it.
>>
>>
>> There is a significant portion (majority?) of the industry which is
>> extremely cost constrained. For instance, to them rotating a design 10
>> degrees is impractical, much less 22 or 45 degrees. Thus, they find other
>> cost-effective yet effective means of solving problems (such as zig-zag
>> routing), even though those don't appear efficient to others to whom cost is
>> not an issue.
>>
>>
>>
>> There are new pressures being applied to this segment - designers are now
>> not only requiring impedance control, but are also insisting on insertion
>> loss control. This is a HUGE paradigm shift, very similar to what we
>> encountered when traceable impedance control was first introduced. That was
>> a very challenging evolution, and this will be also.
>>
>>
>>
>> As an example, PCB vendors are now being advised to smooth their copper,
>> after years of purposely roughening it for best mechanical integrity. It
>> should come as no surprise that this is not a trivial change, considering
>> the effort that has gone into ensuring mechanically robust designs.
>>
>>
>>
>> Likewise, many other basic assumptions that we've been able to apply for
>> years are now being drawn into question, and PCB vendors are looking for
>> help to intelligently and cost-effectively explore options - "How much
>> effect does rougher copper have on insertion loss?". I believe Terry is
>> highlighting the fact that, while there are many tools available for
>> impedance prediction, insertion loss modeling is much less accessible. I
>> don't think it is inappropriate to ask if there are cost-effective, reliable
>> tools available to predict insertion loss based on a proposed stackup.
>>
>>
>>
>> Unfortunately, I believe the answer to the question is that there are no
>> reliable, cheap (~free) modelers available to predict insertion loss. And,
>> the ones that are available require a great deal more knowledge about the
>> stackup than impedance modeling does, and that information is not easily
>> obtained. There are some of us working with a vendor to test their modeler
>> against a variety of stackups and we'll present results at DesignCon. My
>> personal goal is not so much to test a specific modeler but to judge how
>> effective a modeler can be given information that can reasonably be gleaned
>> prior to building with various materials, copper types, etc.
>>
>>
>>
>> In the absence of a modeling tool, or in addition to one, I believe
>> empirical data is the best predictor of insertion loss. To do this,
>> however, you have to build a stackup representing the final design, and it's
>> not clear at this point how broadly you can extrapolate those results to
>> other stackups. But, I know many material vendors and PCB shops are engaged
>> in similar efforts.
>>
>>
>>
>> I think this is very similar to what we went through with impedance control
>> - the shops which most quickly were able to predict and control that
>> characteristic had an advantage. I think successful PCB vendors will need
>> reliable modeling software and empirical data on insertion loss for their
>> particular choices of materials, etc. - they will be able to find the most
>> cost effective solution.
>>
>>
>>
>> Bottom line: I doubt a reliable modeling tool is going to be cheap, but is
>> going to be necessary, and you'll want to compare any tool you do purchase
>> against empirical data before you trust it.
>>
>>
>>
>> I hope this helps,
>>
>> Jeff Loyer
>>
>>
>>
>> -----Original Message-----
>>
>> From:
>> si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>
>> [mailto:si-list-bounce@xxxxxxxxxxxxx]<mailto:[mailto:si-list-bounce@fr
>> eelists.org]> On Behalf Of Terry Ho
>>
>> Sent: Monday, October 29, 2012 5:52 PM
>>
>> To:
>> si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx%3cmailto:si-list@xxxxxxxxxxxxx>>
>>
>> Subject: [SI-LIST] PCB Insertion loss prediction
>>
>>
>>
>> Hello experts,
>>
>> I'm from PCB house. Recently we have producted some insertion loss test
>> boards(16L, SET2DIL coupon, IS415/IT150DA/I-Speed Mid/low loss material with
>> RTF copper foil). We found that the multiply core and high resin PP will
>> result a lower loss result. It's a trouble to MI engineer. I would like to
>> know how to predict the loss base on stackup. Please help to suggest
>> (papers, script, free software etc ). Thanks a lot!
>>
>>
>>
>> Best regards,
>>
>> Terry Ho
>>
>>
>>
>>
>>
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>
>
>--
>Steve Weir
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