[SI-LIST] Virtex -5 PCI ibis file and simulation
- From: crr1231@xxxxxxx
- To: si-list@xxxxxxxxxxxxx, Crr1231@xxxxxxx, cradtke@xxxxxxxxxxxxxxx
- Date: Tue, 08 Jul 2008 09:09:59 -0400
I was wondering if anyone else in the community has been able to implement (in
simulation and in Hardware) PCI at 3.3v on the virtex 5 device (point to point
between processer and FPGA). It seems that the V5 model that I am using
responds the same whether I use 3.3V or 3.0V and gives the same over and
undershoot regardless of trace length using the PCI models in the ibis file.
According to my questionable simulations, overshoot is within range but
undershoot is out by 300mV. My concern is that the sim is somewhat accurate, in
hardware - the input diodes will not be able to clamp and the device will be
damaged (over time). If anyone has successfully used an ibis model ( I am using
the 1136 package), would you mind emailing it to me?
With much appreciation,
Charlene
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