Try this http://www.sigcon.com/Pubs/edn/ParasiticInductance.htm on Dr. Johnson's website. Cheers, Syms. ----- Original Message ----- From: "Naren Thesia" <naren.thesia@xxxxxxxxx> To: <si-list@xxxxxxxxxxxxx> Sent: Friday, December 09, 2005 8:31 AM Subject: [SI-LIST] Via inside SMD discrete > Hi All, > > > My question is related to general PCB discussion. > > Recently I saw via between the component pad for SMD decap (As shown in > attached screen shot). I got clarification that it is to improve the > performance of decap in High speed design! > > > > I unable to understand that clearly. Any one can share his or her > experience? > > > Thanks in advance > > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu