Dear all, Does anyone have any ideas on the best way of creating a variable/run-time-Programmable frequency clock/source for test benching mixed signal circuits/schematics using the spectre circuit simulator? I have tried a number of temporary solutions such as writing a frequency divider using verilogA that counts edges in a Vpulse signal or trying to use the timer events in verilogA or even using an analog mux and a series of input frequencies. However, all these methods are not flexible and they only work for pulses. Any elegant solutions/suggestions for this problem would really be appreciated. I'd prefer not to have to create a PLL in a CSU mode ... :) Thanks, Sincerely, ------------------- Taha Amiralli thamiral [A] uwo [D] ca thamiral [A] gmail [D] com MESc Candidate 2007, Computer Engineering The University Of Western Ontario BESc, BSc. 2005, Computer Engineering & Computer Science The University Of Western Ontario --------------------------------------------------------------- ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu