Carson
The answer is in local vs. global certainty. With pre-layout characterization
of differential interconnect, the generation of design rules should guarantee
the functional operation of a pair, or a small group of pairs. This is a
localized characterization of package/vias/traces/breakouts, and connectors.
This can guarantee local certainty, but not necessarily global certainty.
Global certainty of design comes into play for two reasons. First, layout
professionals, like all professionals make mistakes. A complete global
full-wave post-layout simulation of a complete serdes bus can catch subtle, and
not so subtle, layout problems that might have been missed.
Second, there are full-wave coupling problems that often cannot be observed
without a thorough full-wave analysis that encompasses the entire bus and it's
plane extents.
As long as you are sure that your initial pre-characterization is correct, that
your layout team faithfully translates this into etch, and that there are no
"secret" modes of coupling in the planes of your design, then
pre-characterization only is sufficient to insure design correctness.
Scott McMorrow, CTO Signal Integrity Group
Samtec
Office 401-284-1827 | +1-800-726-8329
www.samtec.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Carson Au
Sent: Thursday, May 4, 2017 6:50 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Value of Post-Layout Simulations
Hi Experts,
How much of your simulation work for SERDES channel designs on PCBs are
pre-layout, and how much is your work post-layout?
Do post-layout simulations add much value to your design process? If you come
up with a robust set of design rules from pre-layout simulation exploration
work, and you adhere to these design rules in layout, there should not be all
that much additional value in post-layout simulations?
Regards,
Carson
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