Content-Type: text/plain;
charset="us-ascii"
Content-Transfer-Encoding: 7bit
Hi guys,
This is a very interesting topic and one near to my heart as it was intended
to be the topic of my PhD thesis. I did not publish or defend, since I was
not willing to publish the math behind the solutions. Having said that, we
have several DesignCon presentations that touch on these subjects this year.
We did publish the open loop from closed loop extraction back in 2012 and
you can find it here
http://powerelectronics.com/power-electronics-systems/extracting-bode-plots-
output-impedance
This method does work, but not that well as it is very sensitive to the
closed loop measurement physical position and also the open loop and closed
loop measurements have different operating points. Another issue is that
many new devices have multiple loops, nested loops or non-linear loops. We
have extracted the root stability information from an extrapolation of
S-parameter datapoints. The stability information is obtained as a cursor
measurement from a single impedance sweep using your favorite impedance
measurement method(s). The software is available for the E5061B, E5071C and
the OMICRON Lab Bode 100. It is extremely fast and accurate. We'll be
showing how this works, along with demonstrations at the DesignCon event
titled KILLING THE BODE PLOT. We will show how this applies to wideband
opamps, voltage references, regulators, audio amplifiers and almost anything
with a closed loop. We recently showed how this applies to DDR termination
regulators and the surprises we discovered in doing so.
While we have not published the derivation, we have shared it under NDA and
we have not only shared the derivation, but also did a walk-through of it
with the Aerospace Corporation for application to satellite systems.
We are also working with Keysight this year on improved state space vector
VRM models for ADS. This model is based on my first book, Switchmode Power
Supply Simulation with PSPICE and SPICE 3. We'll be showing it at DesignCon
(and using it in the Power Integrity Bootcamp Session 1) as well, but here
is a recent article showing how it works.
http://www.edn.com/design/power-management/4440087/Design-a-VRM-with-perfect
ly-flat-output-impedance-in-5-seconds-or-less
Unfortunately getting a good VRM model is quite difficult for a variety of
reasons:
1) Many newcomers mistakenly use voltage mode control for a flat
impedance VRM. This is not a good idea, but in fact a very bad one.
2) Many new devices use transconductance error amplifiers, which the
manufacturers recommend using shunt compensation for. Another very bad idea
3) Three parameters are required from the manufacturer and most specify
none of the 3. One did have a reference article, but they published an
incorrect result
4) Non-linearity's and large signal effects are generally not expected,
but are often present and must be accounted for
All of these topics are included in our DesignCon presentations. In the
first half of 2016 we're developing a new hands-on workshop along with
videos and webinars on how to extract the data required from three simple
measurements and create a usable state space domain model. We'll also show
why PCB simulation is required for the control loop even at DC and very low
frequency. We'll show how to use those parameters to create high fidelity
state space VRM model and how to choose the best bulk capacitors, which are
essential to the process and of course how to fix what didn't go well.
You can find a free webinar on the VRM modeling subject here in a video we
made with OMICRON Lab in 2015
https://www.omicron-lab.com/trainings-events/omicron-lab-webinars.html ;
You'll find both a video and a paper presentation there.
We also have a Power Integrity Meetup at DesignCon this year and we welcome
discussion on this topic that we are so passionate about.
Regards,
<http://www.picotest.com> http://www.picotest.com - Power Integrity
Solutions
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx <mailto:si-list-bounce@xxxxxxxxxxxxx>
[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Charles Hymowitz
Sent: Wednesday, January 13, 2016 7:43 AM
To: istvan.novak@xxxxxxxxxxx <mailto:istvan.novak@xxxxxxxxxxx> ;
buenoshun@xxxxxxxxx <mailto:buenoshun@xxxxxxxxx> ; si-list@xxxxxxxxxxxxx
<mailto:si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: VRM bode plot transformation into output imp profile
Istvan
This (your process outline below) sounds a lot like about what we are trying
to tackle with NISM (Non-Invasive Stability Measurement) and the trials and
tribulations we have had making SPICE models for regulators.
Please see the paper "Why Regulators Need Modeling, Testing, and Analysis"
on http://www.aeng.com/design_analysis.htm or email be directly for more
details on the SPICE model process, but there is zero chance that a general
or generic SPICE model can be developed for VRMs (as you point out the
secondary effects are a killer). From our experience making models for
almost all of the analog IC vendors I can tell you that linear regulator
behavior is so nonlinear over their operating conditions that it is almost
impossible to even make a macro model, let along something 'generic'. In
most cases, the transistor level model is needed to emulate the control loop
accurately. While the vendors give us the transistor level models for the
parts we model, they will not usually do that for end customers. I will not
say that the problem is intractable, certainly the PDN modeling is
challenging in itself, but unless the operating point of the VRM operation
can be narrowed down to a slim win dow, modeling the VRM without the
transistor level model is a tall and very time-consuming order.
As I said I am happy to discuss our many experiences with SPICE modeling of
VRMs but its better done on the phone or in person.
This is a great topic for the Power Integrity Meet Up at Designcon (which
Steve Sandler and I will be at).
Charles Hymowitz - Managing Director
AEi Systems, LLC
Charles@xxxxxxxx <mailto:Charles@xxxxxxxx>
(310) 216-1144
(310) 863-8034 (M)
http://www.aeng.com - Analytical Heavy Lifting
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List forum is accessible at:
http://tech.groups.yahoo.com/group/si-list
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
