Hello Jun,
Each device will have its own Vref_dq. The controller will decide during
calibration what the optimal value for each device (i.e. the controller and
each DRAM) needs to be, and will program the devices accordingly. So, the
controller's Vref_dq will be used during reads and the DRAMs' Vref_dq will be
used for writes.
To answer your question about finding the relationships/values of the Vref, it
will depend on the capabilities of the controller, and the signal integrity of
your system. You could discuss the controller capabilities with your
controller vendor. To determine the SI of your system you could use simulation
tools such as the HyperLynx DDR Wizard (or other similar tools) to determine
the optimal Vref_dq values for your system.
Here is a link for a video which might help give you a background about Vref
for DDR4:
https://www.mentor.com/pcb/multimedia/ddr4-lpddr4-board-design-verification-challenges
Regards,
-Nitin
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of jun li
Sent: Tuesday, November 08, 2016 10:49 AM
To: Si-list
Subject: [SI-LIST] VREFDQ for DDR4
Hi experts,Internal VREFDQ is utilized for DDR3 & DDR4. Does controller VREFDQ
behave as a reference for both read and write? Or controller VREFDQ manage read
and DRAM VREFDQ manage write. If thus, is there any relationship between
controller VREFDQ and DRAM VREFDQ? Since both VREFDQ are internal, how to
realize relationship. Pls advise.
thanksjun
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