Hello, your signals need first to cross the AC level to give the Receiver some overdrive for fast switching and short input setup times. Once your receiver is switched the level is allowed to go below the AC level (min) worst case back to DC (min). Reason for this definition is the difficult signaling with Point to Multipoint connections that cause a lot of reflections. You can close your timing budget either with the VIH AC175 or the VIH AC150. I would need to check in detail, but there should be different setup/hold times given if you assume one or the other level (maybe also just the derating is different...) So if you can not provide the DRAM enough swing to reach Vref + 175mV you can also work with Vref + 150mV, but you have to accept worse setup/Hold times .. Hermann Our next Events: ================ "Open the Black Box of Memory" Seminar on 09/10. October 2012 Check our website or contact us for details EKH - EyeKnowHow Hermann Ruckerbauer www.EyeKnowHow.de Hermann.Ruckerbauer@xxxxxxxxxxxxx Veilchenstrasse 1 94554 Moos Tel.: +49 (0)9938 / 902 083 Mobile: +49 (0)176 / 787 787 77 Fax: +49 (0)3212 / 121 9008 schrieb Balamanikandan K: > Hi, > 1. I would like to know the difference and importance of AC & DC Logic > input levels (VIH(AC)& VIH(DC) ) for single-ended signals in DDR3. > > > 2. For logic High (input) , should the signal level be higher than VIH > (AC)min or VIH(DC)min? > > 3. What is the importance and meaning of VIH(AC 175) and VIH(AC 150) > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu