[SI-LIST] VIA-FillingMaterial
- From: johny leon <leonjony@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 28 Mar 2011 11:52:14 +0530 (IST)
Experts ,
Need an advice about VIA filling methods.
I would like to use VIA filling using 'Solid Cu' for through hole, hidden and
Micro VIAs thinking that that would increase the current carrying ability and
connectivity to the planes/tracks. Is this correct?
My board is a high current board ,upto 150A, but for short duration. This board
gets power through , through-hole VIAs from BOT Layter and transfer it to TOP
Layer components(8Layers). FYI: This is not a high speed board.
I thought of providing Solid Cu filling instead of non-conductive fill for VIAs
thinking that would enable VIAs to carry 'current' effectlively. But I'm not
sure about the manufacutrability and other aspects of Solid Cu filling of the
VIAs. I wanted to fill the following VIAs with Cu :
uVia - L1 TO L2 and L8 to L7
Hidden and stacked with the above VIA - L2 to L7
Hidden VIA - L2 to L7
So my questions are :
1. Is Solid Cu filling of VIAs good method compared to non-conductive fill?
2. Conductive fill means Cu fill or PCB Manufactures use any other materials?
3. Are there any other methods , other than Conductive filling of VIAs, to
enable VIAs to conduct heat and 'current' effectively
4. Finally, Is Solid Cu filling a good method???
Thanks in advance,
Johny.
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