[SI-LIST] Re: Using S-parameter file for SI Simulations
- From: Tesla <emcesd@xxxxxxx>
- To: cristian.gozzi@xxxxxxxxx
- Date: Thu, 15 Nov 2012 09:06:02 +0800 (CST)
Hi,
I think measurement data is better one. i do not think you can model a
capacitor accurate enough in present 3D EM simulation.
Thanks.
Tesla
At 2012-11-15 01:47:54,"Cristian Gozzi" <cristian.gozzi@xxxxxxxxx> wrote:
>Hi
>Yes, you have to include pads in your simulation.
>
>Usually S-parameter of capacitors do not include pads effect because the
>parassitics of pcb used for measuring them are de-embedded with VNA
>calibration
>
>Regards
>Cristian
>
>Chip-Package-Board codesign
>Infineon Technologies Austria AG
>Il giorno 14/nov/2012 18:35, "Syed Razeen" <razeen_rulez@xxxxxxxxxxx> ha
>scritto:
>
>> Hi ,
>> I'v a few queries in SI channel simulations w.r.t to the usage of
>> S-parameter files. When simulating PCIe interface ppl would have used
>> coupling capacitors.
>> When coupling capacitors is in the channel, we usually consider
>> S-parameter files of the capacitor. When using those capacitors should I
>> consider the pads in the channel's Transmission line.
>> Whether the S-parameter file is a measured or simulated file the presence
>> of PAD would have considered, so is it necessary to have the pad in the
>> simulation.
>>
>> With capacitors in use, we provide a clearance to reduce the
>> discontinuities, If S-parameter files are considered will the clearance
>> have an effect or will it provide the results with how the file was
>> generated.
>>
>> Or is it advisable to use HFSS to generate the particular section modeled
>> as required and export Touchstone file and used it in the simulations.
>> Kindly let me know a procedure to proceed further in my analysis.
>>
>> Also i noticed by plotting TDR, I get a positive spike which goes to 110
>> ohms, at the place where the capacitor was considered.
>>
>> Kindly clarify.
>>
>> Regards
>> Razeen
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>
>
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