[SI-LIST] Re: Undershoot issues

  • From: "Alfred P. Neves" <al.neves@xxxxxxxxxxx>
  • To: <jory_mckinley@xxxxxxxxx>, <vani.chandrasekharan@xxxxxxxxx>, <art_porter@xxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 22 Aug 2007 10:52:18 -0700

Try changing the pattern stimulus to a simple clock pattern versus a
data pattern.   This will essentially de-embed the impact of data-like
ISI from simple impedance and resonance issues.   Clock patterns will
still have pedastals, ringing, but will not be masked by ISI.  If you
slow the clock rate down significantly you essentially are running a
TDR/TDT simulation of the system.  When data-like signal lines are
changed to clock signals, it is much easier to determine the impact of
Crosstalk on the system from either clock or data-like aggressors.

Secondly, while maintaining the edge rates, slow down the data rate,
making the U.I. significantly larger for the data pattern.   This will
further provide insight into how much ISI is impacting the eye fidelity,
especially for over and under-shoots.

Another direction is to use a simple pattern like K28.5 as the stimulus,
so you can discern the individual signal trajectories in the eye diagram
versus using a CJTPAT or large PRBS type pattern.


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-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Jory McKinley
Sent: Wednesday, August 22, 2007 9:47 AM
To: vani.chandrasekharan@xxxxxxxxx; art_porter@xxxxxxxxxxx;
si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Undershoot issues


I have not seen ISI cause over/undershoot at this slow toggle rate but
another area you may want to check is potential crosstalk pull-in (same
edges toggling together given a slightly larger forward capacitive
coupling coefficient between traces). -Jory

----- Original Message ----
From: "vani.chandrasekharan@xxxxxxxxx" <vani.chandrasekharan@xxxxxxxxx>
To: art_porter@xxxxxxxxxxx; jory_mckinley@xxxxxxxxx;
si-list@xxxxxxxxxxxxx
Sent: Wednesday, August 22, 2007 9:10:18 AM
Subject: [SI-LIST] Re: Undershoot issues


=20
Hi Art Porter,

I am curious how ISI is related to undershoot, could you please
enlighten me on that?

Thanks and warm regards,
Vani
-----Original Message-----
From: art_porter@xxxxxxxxxxx [mailto:art_porter@xxxxxxxxxxx]=20
Sent: Wednesday, August 22, 2007 7:18 PM
To: jory_mckinley@xxxxxxxxx; Vani Chandrasekharan (WT01 - Embedded &
Product Engineering); si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Undershoot issues

Undershoot could be an indicator of ISI, which could increase the jitter
and lead to poor bit error rates, so you shouldn't ignore it.

Art Porter=20

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Jory McKinley
Sent: Tuesday, August 21, 2007 11:08 PM
To: vani.chandrasekharan@xxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Undershoot issues

Undershoot may not be a problem in your case(s) depending on the
amplitude and duration.  Do you have the input specs for the devices
affected?  Most technologies have a 300mV rating or so DC level above
and below the supply and some have an AC level spec which allows for
more of an overshoot/undershoot but only for some period of time. If you
have a real problem look to better match the trace terminations with
your trace impedance and/or if budget allows slow down the drivers
somewhat.  You should be able to do this in simulation since it appears
you have reasonable lab correlation. -Jory

----- Original Message ----
From: "vani.chandrasekharan@xxxxxxxxx" <vani.chandrasekharan@xxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Sent: Tuesday, August 21, 2007 11:10:22 PM
Subject: [SI-LIST] Undershoot issues


=3D20
Hi,

I am observing undershoot alone in my simulation and also in some of the
on-borad captures of some signals(single ended, less than 50MHz). I am
not sure how to mitigate this issue and how to rootcause this problem.
Kindly give me some perspective on this issue and also some options I
can try to mitigate the same.

Thanks and warm regards,
Vani


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