[SI-LIST] Re: USB 2.0 trace legth limit?
- From: "Carrier, Patrick" <Patrick_Carrier@xxxxxxxxxx>
- To: "Grasso, Charles" <Charles.Grasso@xxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 18 Feb 2011 12:59:51 -0700
Hi Charles--
It is a matter of timing. In the USB spec, section 7.1.16 describes
"cable delay", which breaks down the requirements. There is a maximum
one-way signal propagation of 30ns, which is divided up into a maximum
cable delay of 26ns, host board trace routing of 3ns, and device trace
routing of 1ns.
So, the 18 inches in your document corresponds to the 3ns (assuming a
prop delay of 167ps/in, which is slower than what you would typically
get for microstrip and faster than stripline, but a good "ballpark"
number). But you'd probably want to run an actual flight time
simulation based on your stackup to get the right number and additional
delay from loading.
--Pat
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Grasso, Charles
Sent: Friday, February 18, 2011 7:09 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] USB 2.0 trace legth limit?
Hello all,
I am researching the trace length limit (not matching) for USB 2.0. So
far the only document I have is
from Intel that's 10 years old and the spec there says less than or
equal to 18inches.
Is this still valid?
Is there another spec I can look at?
What recommendations do you folks have?
Chas
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