[SI-LIST] Re: Trace Spacing Rule
- From: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>
- To: <khai77069@xxxxxxxxx>
- Date: Fri, 30 Jun 2006 16:32:15 -0700
A rule of thumb often listed for minimum spacing between high speed
signals (NOT spacing between 2 halves of a differential pair) is 3xh for
stripline and 5xh for microstrip. This is the edge-to-edge spacing, or
"air gap" (not center-to-center pitch), and h is the dielectric
thickness between the trace and nearest reference plane. This represents
a commonly used compromise between acceptable routing density and
crosstalk, and applies for both single-ended and differential signals.
Typically, for 5 mil traces, h is about 5 or 6 mils for stripline and 3
or 4 mils for microstrip, so your spacing is about 15-20 mils in both
cases.
Folks used to quote the minimum separation as a function of the trace
width, but this was done by making assumptions about the corresponding
dielectric thickness for 50 ohms. I think it's better to talk about the
separation as a function of the dielectric thickness, and the other is
coming out of vogue.
At these separations, NEXT is still higher for microstrip than stripline
(and FEXT is 0 for single-ended stripline).
Using 3xh for dual stripline isn't a good idea - it will have more NEXT
than microstrip at 5xh (and about the same FEXT for differential
signals). 5xh is a better number.
Similar guidelines should also be applied for adjacent legs of
"serpentines".
Once you establish this number, you should then run your simulations
with aggressors placed this far from your victim. If the simulations
fail due to crosstalk, you can require more separation or less coupled
length. But, I think you'll find that separations greater than these
guidelines don't buy you much, and you'll have a hard time getting your
board routed. Conversely, your CAD folks might tell you how close they
have to route signals together (and for how long) and your simulations
can analyze whether that spacing breaks your solution.
For spacing between 2 halves of a differential pair, that has a
significant range, with no consistent "rule of thumb" that I've seen.
Disclaimer:
The content of this message is my personal opinion only and although I
am an employee of Intel, the statements I make here in no way represent
Intel's position on the issue, nor am I authorized to speak on behalf of
Intel on this matter.
Good luck,
Jeff Loyer
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Kevin K
Sent: Wednesday, June 28, 2006 7:52 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Trace Spacing Rule
Hi All,
What's the real rule of thumb for trace spacing? =20
I have seen 3w (w =3D trace width) and also 3h (h =3D height of trace =
above
reference plane). I'm interested in 100 Ohm diff pairs. =20
Thank you,
Kevin
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