" So this additional features 'steal' some of the fields / the deposited
copper."
Thanks alex, that makes perfect sense, now I understand why there are different
names for this process.
_
/ (|
( :
__\ \ _____
(____) ` |
(____) | |
(____) . _ |
(___)__ . |_____
BR
Gert
----------------------------------------
HARTING AG & Co. KG, Postfach 11 33, 32325 Espelkamp; Marienwerderstraße 3,
32339 Espelkamp
Generalbevollmächtigte Gesellschafterin: Dipl.-Hdl. Margrit Harting
Persönlich haftende Gesellschafterin: HARTING WiMa AG (Luxemburg) & Co. KG;
Amtsgericht Bad Oeynhausen; HRA 8259; persönlich haftende Gesellschafterin:
HARTING Führungs AG (Registre de Commerce et des Sociétés Luxembourg), B
170749, Luxemburg
Vorstand: Dipl.-Kfm. Philip F. W. Harting (Vorsitzender), Dipl.-Kffr. Maresa W.
M. Harting-Hertz, Dipl.-Kfm. Dr.-Ing. E. h. Dietmar Harting, Dr. rer. nat.
Frank Brode, Dipl.-Ing. (FH), Dipl.-Wirtsch.-Ing. (FH) Andreas Conrad, Dr. iur.
Michael Pütz;
Sitz der Gesellschaft: Espelkamp; Amtsgericht Bad Oeynhausen; HRA 9021; UST-ld
Nr. DE812136745
-----Original Message-----
From: Alexander Ippich [mailto:alexander.ippich@xxxxxxxxxxxxxxx]
Sent: Friday, November 17, 2017 2:55 PM
To: Havermann, Gert <Gert.Havermann@xxxxxxxxxxx>; Scott McMorrow
<Scott@xxxxxxxxxxxxx>; leeritchey@xxxxxxxxxxxxx; CurtM@xxxxxxxxxxx;
w.maichen@xxxxxxx; riaziabe@xxxxxxxxx
Cc: si-list <si-list@xxxxxxxxxxxxx>; si-list-bounce@xxxxxxxxxxxxx; Alexander
Ippich <alexander.ippich@xxxxxxxxxxxxxxx>
Subject: RE: [SI-LIST] Re: Thieving Article
Gert, Scott
have to admit my guilt in using the word 'thieving' a little bit too freely.
I had my 'PCB manufacturer hat' on, when I wrote my statements. And for a PCB
shop, they typically do not distinguish in CAM, if it is for etch
(innerlayer) or plating (outerlayer) homogenity or to avoid larger areas that
are free of copper because of low pressure issues or warpage. The typical CAM
systems will have the option to add 'thieving' and the CAM guy does not care,
what it is for.
The term thieving has to do with plating. The 'thieving pattern' (also called
robber bars) is acting as a sink for some portion of the electrical fields in
the plating. By that, the additional copper that would otherwise be plated on
isolated features get distributed over a larger area of the dots / squares of
the thieving pattern. So this additional features 'steal'
some of the fields / the deposited copper.
Best regards,
alex
----------------------------------------------------------------------------------------------------------------------------------------
Alexander Ippich
Technical Director, Signal Integrity & Advanced Technology OEM Marketing Europe
e-mail: alexander.ippich@xxxxxxxxxxxxxxx
web: www.isola-group.com
-----Original Message-----
From: Havermann, Gert [mailto:Gert.Havermann@xxxxxxxxxxx]
Sent: Friday, November 17, 2017 2:29 PM
To: Scott McMorrow; leeritchey@xxxxxxxxxxxxx; CurtM@xxxxxxxxxxx;
w.maichen@xxxxxxx; riaziabe@xxxxxxxxx; alexander.ippich@xxxxxxxxxxxxxxx
Cc: 'si-list'; si-list-bounce@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Thieving Article
Scott,
I didn't know that there was a special term when you add copper to the outer or
inner Layer, I only knew about the different purpose, but I thought it is
called the same.
So for me (and several of our PCB manufacturers) thieving was simply adding the
dots or squares to whatever Layer, why does the name make a difference?
Do you know where the Term "Thieving" is based on?
----------------------------------------
HARTING AG & Co. KG, Postfach 11 33, 32325 Espelkamp; Marienwerderstraße 3,
32339 Espelkamp Generalbevollmächtigte Gesellschafterin: Dipl.-Hdl. Margrit
Harting Persönlich haftende Gesellschafterin: HARTING WiMa AG (Luxemburg) & Co.
KG; Amtsgericht Bad Oeynhausen; HRA 8259; persönlich haftende
Gesellschafterin: HARTING Führungs AG (Registre de Commerce et des Sociétés
Luxembourg), B 170749, Luxemburg
Vorstand: Dipl.-Kfm. Philip F. W. Harting (Vorsitzender), Dipl.-Kffr. Maresa W.
M. Harting-Hertz, Dipl.-Kfm. Dr.-Ing. E. h. Dietmar Harting, Dr. rer.
nat. Frank Brode, Dipl.-Ing. (FH), Dipl.-Wirtsch.-Ing. (FH) Andreas Conrad, Dr.
iur. Michael Pütz; Sitz der Gesellschaft: Espelkamp; Amtsgericht Bad
Oeynhausen; HRA 9021; UST-ld Nr. DE812136745
-----Original Message-----
From: Scott McMorrow [mailto:Scott@xxxxxxxxxxxxx]
Sent: Friday, November 17, 2017 1:49 PM
To: Havermann, Gert <Gert.Havermann@xxxxxxxxxxx>; leeritchey@xxxxxxxxxxxxx;
CurtM@xxxxxxxxxxx; w.maichen@xxxxxxx; riaziabe@xxxxxxxxx;
alexander.ippich@xxxxxxxxxxxxxxx
Cc: 'si-list' <si-list@xxxxxxxxxxxxx>; si-list-bounce@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Thieving Article
In that case it's not for Thieving, but for copper balance to keep the layers
flat. Since we require ground stitch vias on our test boards and backplanes,
we have them perform a dual-purpose and place oversized square pads on them.
Scott McMorrow, CTO Signal Integrity Group Samtec Office 401-284-1827 |
+1-800-726-8329 www.samtec.com
-----Original Message-----
From: Havermann, Gert [mailto:Gert.Havermann@xxxxxxxxxxx]
Sent: Friday, November 17, 2017 2:52 AM
To: leeritchey@xxxxxxxxxxxxx; CurtM@xxxxxxxxxxx; Scott McMorrow
<Scott@xxxxxxxxxxxxx>; w.maichen@xxxxxxx; riaziabe@xxxxxxxxx;
alexander.ippich@xxxxxxxxxxxxxxx
Cc: 'si-list' <si-list@xxxxxxxxxxxxx>; si-list-bounce@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Thieving Article
Lee,
we do it on every second Backplane Design because we have to (production
yield). And the Backplane PCB supplier really always asks for thieving on inner
and outer layers. And as I said, it's mainly a backplane issue where you have
Layers with less than 2% copper fill.
BR
Gert
----------------------------------------
HARTING AG & Co. KG, Postfach 11 33, 32325 Espelkamp; Marienwerderstraße 3,
32339 Espelkamp Generalbevollmächtigte Gesellschafterin: Dipl.-Hdl. Margrit
Harting Persönlich haftende Gesellschafterin: HARTING WiMa AG (Luxemburg) & Co.
KG; Amtsgericht Bad Oeynhausen; HRA 8259; persönlich haftende
Gesellschafterin: HARTING Führungs AG (Registre de Commerce et des Sociétés
Luxembourg), B 170749, Luxemburg
Vorstand: Dipl.-Kfm. Philip F. W. Harting (Vorsitzender), Dipl.-Kffr. Maresa W.
M. Harting-Hertz, Dipl.-Kfm. Dr.-Ing. E. h. Dietmar Harting, Dr. rer.
nat. Frank Brode, Dipl.-Ing. (FH), Dipl.-Wirtsch.-Ing. (FH) Andreas Conrad, Dr.
iur. Michael Pütz; Sitz der Gesellschaft: Espelkamp; Amtsgericht Bad
Oeynhausen; HRA 9021; UST-ld Nr. DE812136745
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Lee Ritchey
Sent: Thursday, November 16, 2017 6:58 PM
To: CurtM@xxxxxxxxxxx; Scott@xxxxxxxxxxxxx; w.maichen@xxxxxxx;
riaziabe@xxxxxxxxx; alexander.ippich@xxxxxxxxxxxxxxx
Cc: 'si-list' <si-list@xxxxxxxxxxxxx>; si-list-bounce@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Thieving Article
I have not seen thieving added to inner layers.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Curt McNamara
Sent: Thursday, November 16, 2017 8:36 AM
To: Scott@xxxxxxxxxxxxx; w.maichen@xxxxxxx; riaziabe@xxxxxxxxx;
alexander.ippich@xxxxxxxxxxxxxxx
Cc: leeritchey@xxxxxxxxxxxxx; si-list <si-list@xxxxxxxxxxxxx>;
si-list-bounce@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Thieving Article
Great points. Thieving is commonly added (to both external and internal
layers) to increase yield.
Here is an IPC article that mentions this along with other best practice
recommendations.
Curt
http://ipc-rtp.org/past_files/A-Z__2013_IPC_RTP.pdf
________________________________
From: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx> on behalf of
Alexander Ippich <alexander.ippich@xxxxxxxxxxxxxxx>
Sent: Thursday, November 16, 2017 10:27:19 AM
To: Scott@xxxxxxxxxxxxx; w.maichen@xxxxxxx; riaziabe@xxxxxxxxx
Cc: leeritchey@xxxxxxxxxxxxx; si-list; si-list-bounce@xxxxxxxxxxxxx; Alexander
Ippich
Subject: [SI-LIST] Re: Thieving Article
If I would have to get down to these fractions of cents, I would side with
Scott. However, the big influence is regarding manufacturability / yield.
That's why thieving is added.
Don't put it on, and you may find that the outerlayer design is to irregular to
get the plating right (overplating isolated features), causing scrap.
Similar with thieving on innerlayers, this time protecting isolated features
from too aggressive etching.
So my point of view would be, that allowing your PCB supplier to add thieving
(don't forget to give them rules, as Lee has mentioned) is going to reduce
overall PCB cost. Probably not in the short run (cost models are most likely
not that detailed), but it can have an impact on yield and then on your ability
to negotiate cost reductions.
Best regards,
alex
----------------------------------------------------------------------------
------------------------------------------------------------
Alexander Ippich
Technical Director, Signal Integrity & Advanced Technology OEM Marketing Europe
e-mail: alexander.ippich@xxxxxxxxxxxxxxx
web: www.isola-group.com<http://www.isola-group.com>
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Scott McMorrow
Sent: Thursday, November 16, 2017 4:43 PM
To: w.maichen@xxxxxxx; riaziabe@xxxxxxxxx
Cc: leeritchey@xxxxxxxxxxxxx; si-list; si-list-bounce@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Thieving Article
On the other side, there is less copper available for recycling. I'd guess it
is a push in terms of cost.
Scott McMorrow, CTO Signal Integrity Group Samtec Office 401-284-1827 |
+1-800-726-8329 www.samtec.com<http://www.samtec.com>
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Wolfgang Maichen
Sent: Thursday, November 16, 2017 10:38 AM
To: riaziabe@xxxxxxxxx
Cc: leeritchey@xxxxxxxxxxxxx; si-list <si-list@xxxxxxxxxxxxx>;
si-list-bounce@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Thieving Article
My guess would be that if anything it will result in slightly LOWER
manufacturing cost because you etch away less copper, thus consume less etchant.
From:Abe Riazi <riaziabe@xxxxxxxxx>
To:leeritchey@xxxxxxxxxxxxx
Cc:si-list <si-list@xxxxxxxxxxxxx>
Date:16.11.2017 16:35
Subject:[SI-LIST] Re: Thieving Article
Sent by:si-list-bounce@xxxxxxxxxxxxx
Hi Lee,
I reviewed your interesting article entitled "Thieving in Printed Circuit
Boards", and have two question:
1. Does thieving has any effect on "thermal" performance of the board ?
2. Does it increase the PCB manufacturing cost?
Thank you in advance for your response.
Abe
On Wed, Nov 15, 2017 at 3:13 PM, Lee Ritchey <leeritchey@xxxxxxxxxxxxx>
wrote:
I am often asked what the extra small dots are on the outer layers ofmany
dense PCBs. It is called thieving and I wrote an article explainingwhat
it is and why it is used. You can download a copy from our web site<http://www.speedingedge.com> .
www.speedingedge.com<http://www.speedingedge.com>
Lee Ritchey
Speeding Edge
P.O. Box 817
Bodega Bay, CA
94923
408-781-0253
I just used the energy it takes
To get mad and wrote some blues.
Count Basie
Or:
Worry is like a rocking chair,
It keeps you busy but.
It doesn't get you anywhere.
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