[SI-LIST] Re: The necessity of Pull-up resistors in DDR2
- From: Hirshtal Itzhak <ihirshtal@xxxxxxxxxx>
- To: twesterh@xxxxxxxxxx
- Date: Mon, 01 Feb 2010 11:02:43 +0200
Ted,
You're right regarding the timing issue.
The reason I'm quite sure about timing is that the bus is supposed to
work with the low frequency of 200MHz Clock
Itzhak
-----Original Message-----
From: Todd Westerhoff [mailto:twesterh@xxxxxxxxxx]
Sent: Sunday, January 31, 2010 4:52 PM
To: Hirshtal Itzhak
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] The necessity of Pull-up resistors in DDR2
Hirshtal,
Signal integrity is all about getting an adequately clean signal to a
receiver input in time to meet setup and hold requirements.
DDR2 drivers have active pullup/pulldown stages; you don't _need_ a
resistor in the circuit to drive the signal high and low.
DDR2 address and control lines are often multi-drop, termination is used
to maintain signal integrity by controlling reflections. The signal is
terminated to VTT (=VDD/2) to minimize duty cycle distortion.
If your signal integrity simulations suggest termination isn't needed,
it may not be. The important part is ensuring that you're extracting
the correct interconnect delay from your simulations and figuring out
what your timing margins are. This requires normalizing simulation
waveforms to account for the driver's output timing and
setup/hold/derating at the receiver, then computing the interface's
voltage and timing margins. The statement "I get proper wavefoms" tells
only half of the story. Termination reduces the signal swing and
changes the interconnect delay; you have no way of knowing whether your
interface will work without looking at timing as well.
Todd.
Todd Westerhoff
VP, Software Products
SiSoft
6 Clock Tower Place, Suite 250
Maynard, MA 01754
(978) 461-0449 x24
twesterh@xxxxxxxxxx
www.sisoft.com
Hirshtal Itzhak wrote:
> Hello SI Experts
>
>
> I've conducted some pre-layout simulations on a DDR2 bus connected to
> on-board DDR2 devices.
>
>
>
> I found out that I get proper waveforms even if I don't use pull-up
> resistors on the Address & Control lines.
>
>
>
> I wonder if this is an acceptable result! I've always been using those
> pull-up resistors in previous designs.
>
>
>
> Is it a mandatory requirement to have a pull-up resistor to VTT on
these
> lines?
>
> If I don't use them, how is the dynamic current supposed to be
supplied
> to the lines?
>
>
>
> What could go wrong (if at all) if I don't include them in the design?
>
>
>
> Thanks
>
>
>
> Itzhak hirshtal
>
>
>
>
>
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