[SI-LIST] Re: Terminating unused DQs of DDR3

  • From: steve weir <weirsi@xxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Tue, 14 Jan 2014 23:32:48 -0800

It works by absorption of induced signal energy.

Steve.
On 1/14/2014 9:03 PM, Thulasi Ramu J wrote:
> Hi,
> This is with regard to termination of DQs of DDR3 components.
> Please read the text from micron......TN4614
>
> "Occasionally, a x16 DDR device dedicated for error checking and correcting
> (ECC) will
> only use the lower 8 bits of data, and the upper DQ lines will be unused.
> In this case, if
> the x16 DDR component’s DQ15:8 are not used, tie its corresponding UDM/DQMH
> mask pin HIGH to mask activity on this portion of the DQ bus. In addition,
> each pin in
> the DQ15:8 group should be tied LOW through a pull-down resistor (1–10 kΩ)
> to prevent
> noise from WRITE bursts. The same recommendation applies to the lower byte:
> If DQ7:0
> are not used, tie the LDM/DQML mask pin HIGH and ground each unused DQ pin
> through a pull-down resistor. "
>
> I would like to know how the noise from Write Bursts is prevented by
> terminating each pin in DQ15:8 group. Anyway, DQ15:8 are unused pins and
> the controller will only use DQ7:0 pins of x16 DDR.
>
> I have another question. I want to use only DQ3:0 pins of x16 DDR3.  How to
> terminate the following pins. I want to minimize number of terminating
> resistors on the board.
> a. DQ15:8
> b. DQ7:4
>
> Please recommend the best terminating resistor scheme to follow.
>
> Regards,
> Thulasi
>
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