[SI-LIST] Re: Terminating a branched clock line

  • From: Ken Patterson <pattken@xxxxxxxxxxxxxxxxxx>
  • To: "'kevinlfitzgerald@xxxxxxxx'" <kevinlfitzgerald@xxxxxxxx>,si-list@xxxxxxxxxxxxx
  • Date: Fri, 12 Apr 2002 13:14:15 -0400

Placing the branch as close as possible to the destination devices will
maximize this topology.  It keeps the ratio of the length of the stubs vs.
the length from the series termination to the split larger.  Keep the two
stubs equal in length and as short as possible.

                                                      +----> receiver A
   driver                                             |
     >--/\/\/\----------------------------------------+
                                                      |
                                                      +----> receiver B

A good example of balanced 'T' topology can be found in Intel's DIMM
Specification.  You can download it from their developer ftp site at the
following link:

ftp://download.intel.com/technology/memory/unb_001.pdf


Regards,

Ken

Ken Patterson
Senior Hardware Engineer
Laurel Networks, Inc
Omega Corporate Center
1300 Omega Drive
Pittsburgh PA, 15205
PH: (412)809-4200 ext. 4223
email: pattken@xxxxxxxxxxxxxxxxxx

Visit Laurel Networks at www.laurelnetworks.com




-----Original Message-----
From: kevinlfitzgerald [mailto:kevinlfitzgerald@xxxxxxxx]
Sent: Friday, April 12, 2002 11:12 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Terminating a branched clock line



Hi,

I have a clock signal with a 1ns rise time which is distributed to 2 
parts.  The 50 Ohm lines are matched length within +/-50 thou after 
the branch.  Our concern lies with the source termination. Should the 
source termination be before the branch, or immediately after the 
branch ?

Any thoughts,

Thanks,

Kevin

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