[SI-LIST] Re: Suggestions on the length of lines

  • From: houfei chen <hfchen73@xxxxxxxxx>
  • To: rsurs@xxxxxxxxxxx, si-list@xxxxxxxxxxxxx
  • Date: Wed, 16 Oct 2002 14:58:38 -0700 (PDT)

For simple line crosstalk, most EDA softwares can do
the job, like Hyperlynx linesim, Innoveda XTK, Agilent
ADS, Ansoft serenade, sigrity tools (althought it's
not for this purpose mainly), and some lab inhouse
tools published on the web. You can also consider skin
depth (metal thickness), conduct loss and dielectric
loss etc.
For rigorous field solver, you can also choose the
above tools, they all provide field solver, (like
maxwell and momentum, or even HFSS if you want some
connector crosstalk data)
Also the XT highly depends on what frequency you are
running, what signal pattern you are using.
I don't know analysis of line crosstalk will serve as
a ph.d. thesis alone, since most commercial software
can do the job pretty fast and well.

--- Bill Hargin <billh@xxxxxxxxxxxxxxxxxxxxxxx> wrote:
> 
> Hi Ravi:
> 
> One software tool that would help you with this is
> HyperLynx LineSim (now
> part of Mentor).  It's a quick way to set up what if
> scenarios (just like
> you've identified).  Obviously, for a PhD thesis,
> you'd want to validate the
> accuracy with some bench measurements, and compare
> the results with the best
> algorithms you can get your hands on(though the
> software's field solver
> results will be better than closed-form equations). 
> The demo should be on
> Mentor's Website.
> 
> Best Regards,
> Bill Hargin
> Direct: 425-702-0744
> Fax:    425-702-0305
> 
> Cognition Consulting
> Electronic Design Software and Consulting
> http://www.CognitionConsulting.com
> 
> 
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx
> > [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of
> Ravi S. Urs
> > Sent: Monday, October 14, 2002 6:36 PM
> > To: si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] Suggestions on the length of
> lines
> >
> >
> > Hi all,
> >
> > I would like some suggestions on a thesis topic I
> am considering.
> > I would like to develop an accurate and concise
> table (or,
> > better, a graph) that relates errors in neglecting
> crosstalk to
> > length of line, type of line, dimensions, etc.I
> would like to
> > develop a table for lines on chip,on a chip
> carrier and lines on
> > a PCB.I would like suggestions on the length of
> lines, type of
> > lines ,dimension of the lines, the distance
> between lines I
> > should consider .
> >
> > Ravi
> >
> >
>
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> 
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