[SI-LIST] Re: Stripline vs. Microstrip selection
- From: "Alfred P. Neves" <al@xxxxxxxxxxxxxxxxx>
- To: "liewluping@xxxxxxxxx" <liewluping@xxxxxxxxx>
- Date: Wed, 9 Jul 2014 06:17:53 -0700
Send me a pm, Ill send you S-parameter models for our Intersymbol Interference
Platform, ISI-28 so you can do your own simulations in both microstrip and
stripline. The platform includes both structures with pristine launches from
3 to almost 50inches of differential trace. We also have BERT data from 10
to 32Gbpsec, corresponding to simulated measurements.
Our BERT and simulated S-parameter eyes data suggests both structures works
well, but Gert is correct in that VIA and launch issues highly impact the
jitter results. Poor return loss structures, along with weave issues and poor
fabrication can create resonance in systems which wreaks havoc on jitter
repeatability and simulation correspondence to measurement.
- Al Neves
Products for the Signal Integrity Practitioner
Alfred P. Neves
Chief Technologist
Office: 503-679-2429
www.wildrivertech.com
On Jul 9, 2014, at 12:26 AM, Havermann, Gert <Gert.Havermann@xxxxxxxxxxx> wrote:
> Hi LIU,
>
> the answer was already given in your first link of the SI-List.
> It all depends on what and how you are comparing.
>
> Just use an Impedance calculator and check both options for your Project with
> the given restrictions in Stack-up, material, Layer count, EMI rules... and
> then you will find the best solution.
>
> One thing you should keep in mind is the impact of vias. If aou are able to
> route the signals without using vias, then Microstrip has advantages. If your
> Chip is a BGA and has vias anyway, then stripline should be the best option
> as no madditional vias have to be used.
>
> BR
> Gert
>
>
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> -----Ursprüngliche Nachricht-----
> Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im
> Auftrag von Luping Liu
> Gesendet: Mittwoch, 9. Juli 2014 08:25
> An: si-list@xxxxxxxxxxxxx
> Betreff: [SI-LIST] Stripline vs. Microstrip selection
>
> Hi All:
> I have a few 4 inch 25Gbps channel on my board,the design requirement is
> the lowest total loss first, and if possible , use hybrid stackup to reduce
> the cost (M6+FR4), but I am not sure if we can use microstrip to get lowest
> total loss, some different view points are found :
>
> 1.For the same trace width and copper thickness considerations,stripline
> results in less signal attenuation compared with microstrip.
> http://www.altera.com/literature/an/an672.pdf, figure 10 .
>
>
> 2. Stripline more lossy than Microstrip.
> //www.freelists.org/post/si-list/Stripline-more-lossy-than-Microstrip,2
> //www.freelists.org/post/si-list/Microstrip-vs-Stripline,6
>
> 3. Microstrip have more impedance variations
> 8_FR1Paper_MovingHigherDataRateSerial Designcon2014
>
> My question is :
>
> qs1. Why they have so much difference at IL@ 12.5GHz? if radiation loss play
> the role, does it have a knee freq which the microstrip loss over the
> stripline?
>
> qs2. Consider the via loss , is it better to use microstrip to get lowest
> loss for this <4 inch channel (all use 8mil width)?
>
>
> Thanks and Regards,
> LIU Luping
>
>
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