[SI-LIST] Re: Strange resets happening in one of our circuit boards
- From: Doug Smith <doug@xxxxxxxxxx>
- To: jhill@xxxxxxxxxx
- Date: Tue, 06 Jun 2006 21:53:51 -0700
Hi John and the group,
Scope probes of the kind you are thinking of cannot be used if
impulses from ESD in the same room are suspected. The probe will show
a pulse that is not really there. They make great ESD event detectors.
Generally, a custom measurement setup must be designed for the
product. Often this is a shielded magnetic loop for measuring voltages
in the circuit (yes voltages! see some of the papers at
http://emcesd.com , my site) or a home built voltage probe of very
small dimensions. In any case, the measurement must be proven to be
correct before using the result. I call this a "null experiment." For
a voltage probe it is shorting the probe to the circuit ground and
making sure what you see is much smaller than the measurement of the
node you want.
Doug
Hill, John wrote:
> Hello,
>
> I like to add a series 100 ohm resistor at the reset pin on the
> microprocessor. With a 10K pull-up the voltage divider is not an issue,
> but with a scope you can see what is going on.=20
>
> This does two things. First, there is a little RC to the input. Second,
> if there are multiple open collectors on the reset pin, you can tell
> which pin is driving the reset signal low.=20
>
> When you show a programmer that current is going into their chip, they
> believe that it is really his chip pulling the reset low.
>
> Best regards,
>
> John
>
>
> =20
>
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> -----Original Message-----
>
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Andrew Ingraham
> Sent: Friday, June 02, 2006 11:43 PM
> To: SI-List
> Subject: [SI-LIST] Re: Strange resets happening in one of our circuit
> boards
>
>
>>Even though reset durations may be long, you still need to bring
>>everybody out of reset in a timely fashion.
>
> ...
>
>>Thus the asserting edge of reset might be slow, but the negating
>>edge may need to be faster.
>
>
> And in other cases the asserting edge needs to be reasonably fast too.
> Sometimes it's necessary to "get everyone off the bus" (disable all
> output
> buffers) quickly. "Quickly" here may mean on the order of 10s of
> nanoseconds; not exactly lightning fast, but not so slow that you don't
> care
> either.
>
> The designer needs to understand the system's requirements,
> specifications,
> and Reset timing. Each case may be different.
>
> Regards,
> Andy
>
>
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