[SI-LIST] Re: Stack up advice needed

  • From: Nagy István <buenos@xxxxxxxxxxx>
  • To: steve weir <weirsi@xxxxxxxxxx>
  • Date: Fri, 12 Jun 2009 10:11:20 +0200 (CEST)

hi
if you want 16 layers, and 6 signal layers, then I would suggest this one:

1. fanout+pow ------------------------------------------ 12um+plating&um
.       prep. 
2. Power ------------------------------------------ 17um
.       prep or core. 
3. Gnd ------------------------------------------ 17um
.       prep  
4. Signal ------------------------------------------ 12um
.       core. 
5. Gnd ------------------------------------------ 12um
.      prep. 
6. Signal ------------------------------------------ 12um
.       core 
7. Gnd ------------------------------------------ 12um
.       prep. 
8. Signal ------------------------------------------ 12um
.       core    -------------symmetrical to this line--------------

This way all the signal routings are referenced only to ground. you need 
decoupling of the planes under the chips using them. On top/bottom, you do only 
fanout, no long signal routings. If you change layer in the middle of the 
board, you still need stitching GND vias. you will not to get away without 
them, although it is a common design practice to not to change layer in the 
middle of the signal path.

Istvan Nagy
CCT




steve weir <weirsi@xxxxxxxxxx> írta: 


> JF, if you are intent on being free of bypass capacitors for return path 
> ballast then you need to know how your signals are referenced from the 
> die out. You an economize on lyer by using offset stripline for the 
> signals as you have with 8/9. I am not very partial to this stack-up 
> because it has a lot of layers, and signals still reference planes other 
> than GND.
> 
> 
> Steve
> 
> jhasson@xxxxxxxxxxxxxxxxxxx wrote:
> > Hi,
> > The stackup I have to deal with involves many different power supplies 
> > which lead to the following potential stack up :
> > Layer 1 - - - - - - - Sig
> > Layer 2 - - - - - - - GND
> > Layer 3 - - - - - - - Pwr1,Pwr2,Pwr3 (local planes)
> > Layer 4 - - - - - - - GND
> > Layer 5 - - - - - - - Pwr4 (large plane)
> > Layer 6 - - - - - - - Sig
> > Layer 7 - - - - - - - GND
> > Layer 8 - - - - - - - Sig H
> > Layer 9 - - - - - - - Sig V
> > Layer 10 - - - - - - - GND
> > Layer 11 - - - - - - - Sig
> > Layer 12 - - - - - - - Pwr5 (large plane) 
> > Layer 13 - - - - - - - GND
> > Layer 14 - - - - - - - Pwr6, Sig (local plane)
> > Layer 15 - - - - - - - GND
> > Layer 16 - - - - - - - Sig
> > In my previous post, I was wondering what would be the return current path 
> > when the signal output from a driver was referenced to a power plane 
> > different than the one used by the driver and had to change layers. I 
> > don't feel very comfortable with adding decoupling capacitors at via 
> > transitions which is the reason for the stack up above where gnd planes 
> > are located below the top and the bottom layers. In this stack up signals 
> > are routed between layers 6 and 8 and others between 9 and 11. Plan is to 
> > have the same thickness between all layers (4mils). Should layers 8 and 9 
> > be separated more than the others assuming horizontal and vertical routing 
> > is satisfied ?
> > Could anyone comment on this stack up ? 
> >
> > Best regards,
> >
> > JF Hasson
> >
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> 
> -- 
> Steve Weir
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