[SI-LIST] Re: Splitting this power plane - And GND planes count
- From: "Sol Tatlow" <Sol.Tatlow@xxxxxxxxxxxxxxx>
- To: <alan@xxxxxxxxxxxxxxxxx>, <weirsi@xxxxxxxxxx>, <ivor@xxxxxxxxxxx>, <gil.gafni@xxxxxxxx>
- Date: Sun, 13 Mar 2005 00:57:40 +0100
Ivor,
While I agree with Alan that his stackup, at cost of 'only' 2 more =
layers, is DEFINITELY
a huge improvement, it seems to me, that noone answered your original =
question: "it
shouldn't hurt to split layer 9?". Plus, Alan's idea doesn't really help =
you with regards to the
additional power planes you have spread across 3 _signal_ layers .... In =
fact, if you took
his advice, and STILL split the same power plane, it could look even =
worse for the signals
on the neighbouring signal layer. Plus Gil's question (GND floods) =
remains unanswered ...
1. Relating to your original plan: while layer 7 may be well bypassed, =
are you sure the
Signals on layer 8 are referencing to that layer? Depends upon source =
voltages and core/
prepreg thickness, I would have thought ... At any rate, with a =
significant split in the plane,
you will in any case get a trace impedance mismatch, if only small, at =
the split. AND, any
components on the bottom side in this area, without their own tightly =
coupled GND planes
will very likely be, as Steve said, an EMC problem.
2a. You flood all signal layers with GND 'to make up for only 1 GND =
plane' ... Sounds like
a good idea in theory, BUT, from my experience, a board that is dense =
enough to REALLY
need 4 inner signal layers has no space on those layers in those areas =
where the extra
GND flood would be of real benefit ... AND it certainly won't help the =
components on the
bottom side in that split plane area. MIGHT help with overall current =
capacity though.
2b. PLUS, the ground flood will, of course, affect the impedance of any =
tracks adjacent to the
GND floods. Not so bad for layers 3 and 8, where there are no =
neighbouring signal layers, but
for 5 and 6, if you have controlled/targeted impedance lines (and LVDS =
usually are), you are
asking for multiple swings/steps in trace impedance as signal traces =
enter/leave GND floods
on neighbouring layers, which is going to be bad news. Same goes for =
power islands on
signal layers with neighbouring signal traces, of course.
3. Gil: IF you GND flood the signal layers, you should look to get a =
good compromise
between lots of GND vias and carving up the power planes. If you are =
limited to very few GND
vias, look to place them well - for example, in the vicinity of large =
busses changing layers:
with busses referenced to multiple GND layers (if you have them!) this =
will improve return
current paths.
Anyway, having looked at your website, Ivor, I see you work in =
military/medicine areas, where
I would have expected the extra dollars for the 10 up to 12 layer step =
to be an investment. At
least get it quoted - it may be less than you think. For example, on my =
latest project (17,500
pin board) I went for 26 instead of 18 since the price increase was only =
marginally over 10%!!
This increase in layer count allows me to double up 2 of the 4 power =
layers (and yes, I NEED
4 different power layers thanks to large pin count Xilinx FPGAs with up =
to 4-6 different supply
voltages in the same area!), as well as adding more 'GND/PWR cavities'.
And then, if you go from 10 to 12, take Alan's stackup, since, as Steve =
said, this will majorly
help on the EMC side of things (with extra GNDs), and add pairs of =
PWR/GND floods on sig
layer pairs where needed, PLUS judiciously chosen split planes to give =
you the 3 power
layers you need without disrupting signal impedances. With the right =
combination, you will
get more than ample current capacity, multiple GND/PWR pairs, and an =
excellent PDS,
without too much of a compromise with regards to signal trace impedance =
or cost.
Good luck!
____________________________________
Sol Tatlow, M.Eng. (Oxon)
ProDesign Electronic & CAD Layout GmbH
Product Developer
Albert-Mayer-Str. 16
D-83052 Bruckmuehl
Phone: +49 (0) 8062-808-302
Fax: +49 (0) 8062-808-333
Mailto:sol.tatlow@xxxxxxxxxxxxxxxxxxxx
www.prodesign-europe.com
____________________________________=20
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
