Hello Jongbae I think Alan is correct in saying you need adequate analysis. However I think your question is more fundamental: why split ground on the chip and why split ground on the PCB? In many cases, there is no need to split the ground on the PCB, but sometimes there is a need for an analog or converter device on that PCB to use separate ground connections. Let's look at such a case. A device with an input and output is sensitive to the input voltage measured with respect to one of its ground return terminals. The output drives a current, which flows through a bond wire. The return current also flows through a bond wire, which has impedance to the signal, especially the high frequency components of the signal. If the output and input share the same ground terminal, the voltage drop in the ground connection impedance is coupled back to the input. This is called common impedance coupling.=20=20 This leads to the idea that input ground connections should be separated from output ground. Most designers of high speed circuits will provide separate chip bond connections, in cases where they expect there will be an advantage from doing this. (The expectation may come from calculation, simulation or experience.)=20=20 In some cases, similar arguments apply to the power supplies, which may require multiple connections to the same supply, which can be by-passed at the PCB, but by-passing on the chip can only be done in a very limited way or sometimes it is not practical at all. On the PCB a similar argument can be applied, but in many cases there is more advantage to maintaining a solid ground plane. In that case the split chip grounds we just mentioned are connected separately to the same PCB ground. There is a need to split the PCB ground plane only in cases where there is a special sensitivity to circulating ground currents in the system. For example some oscilloscope input PCB circuits have used a slot between input channels to achieve very high analog signal isolation. In that case there may be a need to look at one signal of several volts and compare with a signal of a few millivolts, so an isolation of some 80 dB may be required. This is an extreme case to illustrate the point. There will be various sensor systems for example which may also require some similar treatment.=20 Geoff Stokes Systems Engineer Zetex Semiconductors plc Zetex Technology Park Chadderton Oldham OL9 9LL UK =20 +44-161-622-4857 www.zetex.com www.zetex.cn =20 =20 -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Alan.Hiltonnickel@xxxxxxx Sent: 07 June 2006 19:01 To: jbtera77@xxxxxxxxx Cc: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: Split GND Plane on PKG Jongbae, Your blanket statement, "most package designers split their ground=20 planes in PKG" is not necessarily true, and is certainly not provable. I can tell you what a GOOD package designer will do: they will structure their power and ground carefully in the context of the silicon they are=20 connected to and the PCB environment they are planning to connect that=20 silicon to. I have been know to reconnect isolated ground planes that=20 others felt should be separate from regular "ground", with no ill=20 effect. I have also been known to be very particular about how a=20 separate ground is routed to provide a minimal noise coupling for, say,=20 a PLL. A designer who splits a ground plane should provide an adequate analysis (preferably with simulations) to back up such a drastic action, and=20 should also have a strategy to minimize the impact on high speed signals and EMI. Alan. jbtera77@xxxxxxxxx wrote On 06/06/06 22:29,: >Hi, all >As i know, most PKG designers split their ground plane in PKG. It is >usually for seperation of digital with analog. However, i think, even if we >split GND on PKG, once the package is connected to board by BGA or >wirebonding, the effect of split-GND on PKG will not be appear. Instead, the >board design is much more dominate than pkg p/g design. >So, in my opinion, we don't have to split its ground plane on PKG because it >doesn't affect to overall p/g design including board (maybe a little) and >splitting the ground plane may cause the signal integrity problem. > >Could you please let me know the reason designers split the ground plane in >package. > >rgs, >Jongbae. > >=20=20 > --=20 Alan Hilton-Nickel Signal Integrity Engineer Sun Microsystems Inc. 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