[SI-LIST] Re: Slow Silicon, Fast silicon question

  • From: "Nijagunamurthy, Hithesh (GE Intelligent Platforms)" <hithesh@xxxxxx>
  • To: "steve weir" <weirsi@xxxxxxxxxx>
  • Date: Wed, 29 Dec 2010 12:15:45 +0530

Steve,

What about temperature?
Sisoft uses 100 deg C for slow silicon and 0 C for fast. 
Vcc together with temperature gives rise to slow silicon or is the
temperature independent from Vcc(just another variable)?
You can just vary the temperature and the simulator adjusts the speed
accordingly?

Regards,
-Hithesh



-----Original Message-----
From: steve weir [mailto:weirsi@xxxxxxxxxx] 
Sent: Wednesday, December 29, 2010 11:37 AM
To: Nijagunamurthy, Hithesh (GE Intelligent Platforms)
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Slow Silicon, Fast silicon question

Yes, increasing supply voltage speeds up CMOS circuits.

Changes in trace impedance have several effects:

* Changes that result in discontinuities cause reflections which will
create pattern dependent timing changes.
* Lower trace impedances are less affected by package parasitic
capacitance which speeds up transition times at the far-end.

You should be matching the channel impedance all the way through.  While
there are exceptions, it is generally a bad idea to intentionally
introduce an impedance discontinuity.

Steve
Nijagunamurthy, Hithesh (GE Intelligent Platforms) wrote:
> In SI simulation there are options for Slow silicon and Fast silicon.
> I understand these are due to process variation. But how does the 
> simulator simulate this.
>
> In sisoft, for fast Vcc is 1.1*Vcc and for slow 0.9*Vcc
>
> Does increasing Vcc have the same effect as having a fast silicon?
> There's also temperature listed. Does the simulator use a combination 
> of Temperature and voltage?
>
> Similarly, for the PCB etch variation - does change in trace impedance

> mean change in speed or rise time/fall time?
>
> Thanks,
> -Hithesh
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