[SI-LIST] Skewed Silicon Parameters
- From: <james_r_jones@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 7 Feb 2006 14:51:46 -0800 (PST)
Experts,
There are numerous silicon parameters that can be
skewed that will affect the strength of the silicon.
There are parameters that represent oxidation, channel
length, doping, etc.
Question is, do these parameters affect P and N type
transistors differently?
In our simulations, we skew 'process' to either fast
or slow (or maybe typical). In reality, is it
possible to have fast N-type ans slow P-type or vice
versa? Why? What process parameter combinations
could cause this to happen? Do we need to cover this
possibility in simulation?
Thanks,
-James
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