[SI-LIST] Skew boards
- From: Hora Abu <arageeb@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 8 Jan 2003 18:11:01 -0800 (PST)
Dear SI- Subscriber list:
Dear SI- Subscriber list:
I am newly working for a company which build high speed board for data
communication. A new silicon is being released and we were asked to build
skewed boards to validate silicon at different corners of the process. Target
board impedance is 100 diff +/- 20% and so we are to build board with high
impedance and others with low impedance (120Ohms +/- 5% & 80Ohms +/-5%) where
the high impedance will be combined with slow silicon and low impedance with
fast silicon. What sense does this make? To my knowledge the board
impedance has no effect on signal propagation (signal speed is C/sort(Er) ).
I can understand building and testing skewed silicon to test the process limits
but I can understand why it has to be tested with skewed boards. If the speed
is not the issue may the requirement is test signal integrity with different
silicon? If this the case then what silicon goes with what board impedance and
why?
Could someone help clarify this?
Thanks
Argov
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