[SI-LIST] Simulating SI and PI through a "passive" backplane
- From: "Cuong P Nguyen" <cuong@xxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 2 Mar 2010 19:07:52 -0800
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Anyone has any comments on simulating crosstalk on high speed diff pairs
running through a "passive" backplane?
The topology is as follow:
1. The driver resides on board #1.
2. This board connects to a passive backplane with only connectors.
No other components (incl. decoupling)
3. The receiver is on board #2.
My question is really on the effects of the GND and PWR planes (on the
passive backplane) on the diff pairs and
whether or not the crosstalk analysis will be accurately modeled.
For Power Integrity Analysis, if the driver is on 1st board and receiver is
on 2nd board and there are 2 connectors
in between (with many pins inter-connecting the PWR and GND of the back
plane to the PWR and GND of the
1st and 2nd board), how will the DC drop analyzed?
Thanks for your feedback.
----------------------------
Cuong Nguyen
<http://www.edadirect.com/> edasmall2
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