[SI-LIST] Signal integrity positions at NVIDIA (Santa Clara, Ca)

From: Joshua Hasten <JHasten@xxxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Date: Fri, 21 Feb 2003 19:11:26 -0800
You can find the job descriptions on our website at
http://pljb1.rmx.scd.yahoo.com/pljb/nvidia/nvidiaemployment/applicant/index.
jsp
<http://pljb1.rmx.scd.yahoo.com/pljb/nvidia/nvidiaemployment/applicant/index
.jsp>  
I've included 1 bellow. (note: there are different positions in our other 2
groups, which you will find on our website, looking for more mid-level
engineers.)

If interested, please send your resume to hr@xxxxxxxxxx
<mailto:hr@xxxxxxxxxx>  or refer it to one of your friends/acquaintances
that may work here and give them an early Christmas present (referral
bonus).


Senior/Lead Signal Integrity Job Description:
Contribute to a group performing signal integrity analysis using industry
standard simulation and field-solving software.  Perform worst case
simulations of boards and systems, including reflections, impedance, delay,
crosstalk, ground-bounce, terminations.  Develop and procure simulation
models and perform model verification to ensure accuracy. Document test
plans and analysis results.  Develop correlation studies and perform lab
measurements to validate results.  Interface with ASIC designers, hardware
engineers, EMC and CAD designers to implement solutions for product quality.

Skills Required:
*       Requires MSEE/CS combined with 5 - 7 years of related experience, or
BSEE/CS combined with 7 - 10+ years of hands on experience performing Signal
Integrity analysis for ASICs, PCBs, and systems from design phase to
production. Must be well versed in interconnect technology, packaging and
measurement techniques
*       In-depth knowledge of high-speed design, transmission line theory,
field-solving methods, noise analysis and EMC techniques plus extensive
knowledge and experience with HSPICE is required.
*       Extensive experience with signal integrity analysis tool such as:
Quad XTK/TLC, Spectraquest, Ansoft, Apsim, Speed2000.  Knowledge of modeling
methods and requirements for Timing and Signal Integrity analysis of PCB and
System-level components and chip-level technology.  Must have the ability to
ensure accurate and complete models.
*       Candidate should understand the impact that design, layout and
technologies have on signal quality and be able to recommend feasible
solutions.  Lab experience with data analysis, ability to verify simulations
and predictions is essential.
*       Should be able to help define and implement strategies and processes
for analyzing signal integrity at different stages of the design process.
Experience correlating simulation results with lab measurements using
oscilloscopes, TDRs, VNAs, and spectrum analyzers is a plus. Experience
integrating commercial software and developing scripts/programs (Perl,
cshell, C) to facilitate the Signal Integrity Analysis flow a plus.


Joshua Hasten
O: (408) 486-8226
jhasten@xxxxxxxxxx 



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[SI-LIST] Signal integrity positions at NVIDIA (Santa Clara, Ca)

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