[SI-LIST] Signal Integrity project in San Jose, CA

From: "Kevin Pierpoint" <kevin_pierpoint@xxxxxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Fri, 16 Jun 2006 10:55:24 -0700
I waned to see if anyone is qualified, interested and available for a
full-time contract project (6 months) in San Jose? Please see below:
 
 
 
 A proven track record of mastery and success in the design, development,
and testing of high performance memory interfaces and systems (particularly
DDR2 and beyond), signal integrity, timing analysis, hands-on hardware
debugging, and diagnostics; 
. Tangible experience at modeling, designing, developing, and improving
high-speed digital electronics, especially high performance DRAM-based
systems, and memory controllers. And: 

. Lead the development of dense, high-performance memory and other advanced
digital systems which may require advanced electronic design and thermal
techniques 

.Qualifications and Experience: 

. 5 years minimum experience, including significant "hands on" high
performance digital system design experience

. Designing, developing, and verifying advanced digital systems and/or
modules 

. Very strong understanding of all aspects of high performance DRAM and DDR
memory, including architecture, bank interleave techniques, chip kill,
refresh, signal integrity, timing, 2 power, decoupling, error detection and
correction, soft errors, memory controller interfaces, DIMM design, test
patterns, testing, debug, and performance characterization. 

. Expert at signal integrity, timing delay, power distribution, and noise
issues and methods of mitigation concerning high-performance digital
electronics systems 

Additional Desirable Qualifications: 

. Has a solid understanding of computing current standards and chipsets.
These include: PICMG 2.X, IPMB, Gigabit Ethernet, SCSI, FDDI, S-ATA, DDR,
DDR-2, Infiniband, HyperTransport, PCI-X, USB2, high performance
microprocessors from Intel, AMD, IBM, and Sun and their bridge chips 

. Experience with advanced semiconductor packaging and interconnect
technologies, mixed analog-digital design, firmware development, power
regulation design, thermal management, high reliability designs, OS device
drivers, and backplane development 

. Knowledge of Linux internals and device drivers 

. Demonstrated skill in ASIC and FPGA design is highly desirable 

. Experience dealing with military/government-oriented companies, agencies,
and other organizations 

. US Government security clearance/s (or able and willing to be processed
for a security clearance)  

 

Please contact me directly if interested.

 

Regards,

  
Kevin D. Pierpoint
Oxford & Associates, Inc.
(408) 245-3915 x111
 


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[SI-LIST] Signal Integrity project in San Jose, CA

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