------------------------------------------------------------------------------------------------------------------------------------------------------ Join us for an Informative Day - "Signal Integrity Principles and Their Applications To High Performance Design Choices and Cost Trade-offs" Simply reply to this e-mail to register for Dr. Ed Sayre's Signal Integrity Seminar being held Tuesday, May 21, 2002 from 9:00 to 4:00 at the Boxborough Holiday Inn in Boxborough, Massachusetts (exit 28 off of Route 495) We look forward to seeing you there! ------------------------------------------------------------------------------------------------------------------------------------------------------ COURSE TITLE: "Signal Integrity Principles and Their Applications To High Performance Design Choices and Cost Trade-offs" LOGISTICS: Tuesday, May 21, 2002 Boxborough Holiday Inn, Boxborough, Massachusetts 9:00 AM to 4:00 PM Minimal Cost of $49.99 - Includes Handouts, Lunch and Coffee Breaks COURSE ABSTRACT: Mitigating risks - a key ingredient to successful design, especially when every cent counts. Dr. Ed Sayre, well known signal integrity expert, will spend the day with you reviewing the fundamentals of signal integrity design practices and then applying them to real world design situations. COURSE AGENDA: 8:30 - 9:00 Registration 9:00 -12:00 Signal Integrity and PWB Fundamentals Topics Include: Definition of Key Signal Integrity Terms PWB Transmission Line Theory and Practice In Digital System Design PWB Impedance Curves and Design Trades Coupling and Crosstalk In Connectors, PWBs and Transmission Lines PCB Impedance 12:00 -1:00 Lunch Break 1:00 - 4:00 What's Hot In the Design World and How to Apply the Fundamentals to Mitigate Design Risks and Costs. Topics Include: DDR and DDR2 Memory Signal Integrity & Timing Connector Ground Bounce How to Deal With a Legacy System Problem EMC and EMI Issues on Boards Equalization of Chips, Cables and Connectors PCB Choices Influence Gigabit Product Performance PCB Board Buzz Words Do These Features Provide a Cost-Competitive Edge? Low Loss Dielectric Materials High Density Interconnect (HDI) layers Mitigating via Effects - Back Drilling, Blind and Buried Vias Buried Capacitive Layers Are They Worth the Cost? Wrap-up with questions and answers. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu