PMC-Sierra is currently need a Senior Signal Integrity engineer to join our growing team. Your role will be to participate in the full development cycle of leading-edge System on a Chip (SoC) products and ensure the highest standards in signal integrity are met. This involves the analysis and design recommendations for the overall system, including advanced mixed-signal and I/O circuitry, IC packaging, PCB, connector and cabling technologies. RESPONSIBILITIES * Responsible for the signal integrity analysis and creation of design recommendations for IC package and PCB systems. Topics include optimization of high speed, and low speed signal propagation, jitter, power nets, cross-talk, and EMI/EMC. * Recommend changes to SI flow, through the on-going search for better methodologies, tools, equipment, and outside capabilities. * Create IC package, PCB, connector, cabling electrical models using 2D/3D EM modeling, or lab measurements, which will be used for analysis in the electrical circuit simulators and analysis tools. * Hands on validation of waveforms (high speed, low speed, jitter, power nets, cross-talk, EMI) and models in our lab using high speed oscilloscope TDR, TDT, VNA, Spectrum analyzer, phase noise analyzer measurement tools. * Interact with our Mixed Signal designers, Packaging Development group, Digital Design teams, Product Validation teams, Customer Application group, to provide analysis and SI support and documentation throughout the development cycle of our ICs. * Mentor and oversee the work of more junior Signal Integrity engineers * Educate design community on good Signal Integrity design practices for boards/packages/ICs. * Interface with customers to provide analysis or recommendations to ensure the success of their systems. REQUIREMENTS * Bachelor in Electrical Engineering with extensive industry experience; MaSc or Phd in EE with specialization in Microwave is preferred. * Extensive experience designing, modeling, and analyzing multi-port RF, gigabit serial, DDR memory signals in wire-bond and flip-chip packages. * Extensive experience with package and PCB power delivery modeling and analysis. * Experience with current signal integrity and RF design software tools such as Hspice, Spectre, Spectraquest, Allegro, APD, ADS, PakSi, HFSS (or equivalent 3D EM fieldsolvers), Speed2000 (or other similar power network modeling tools), and MatLab. * Demonstrated understanding of common hardware signaling interface standards such DDR, PCI-Express, USB-2, Gigabit Ethernet, Fibre Channel, SAS, SATA, and understanding of hardware system designs. * You will have extensive lab experience measuring and characterizing high frequency signals and networks using such tools as oscilloscopes, TDR, TDT, spectrum analyzers, phase noise analysers, spectrum analysers for use in modeling software or for signal quality investigations. * Superior design and problem-solving skills. * Excellent analytical, communication and documentation skills. * Requires working from our Burnaby, BC office DESIRABLE SKILLS * Experience developing, modeling, and analyzing DDR interfaces on SOC devices. * Experience developing RF and microwave circuits. * Cadence design tool scripting (Ocean), UNIX/LINUX experience, and Tck/TL scripting familiarity is an asset. John Plasterer Leader, I/O Development and Signal Integrity PMC-Sierra Burnaby, BC (604) 415-6053x2656 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu